msi/ms7721: Switch away from AGESA_LEGACY_WRAPPER

Change-Id: I39a0b4acbe44dca8be63201502be739d954c8a33
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-03-04 07:34:08 +02:00
parent ffa527002a
commit a84e34be25
4 changed files with 36 additions and 56 deletions

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@ -16,13 +16,12 @@
#include "AGESA.h" #include "AGESA.h"
#include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <cbfs.h> #include <cbfs.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <stdlib.h> #include <stdlib.h>
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr);
const BIOS_CALLOUT_STRUCT BiosCallouts[] = const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{ {
{AGESA_DO_RESET, agesa_Reset }, {AGESA_DO_RESET, agesa_Reset },
@ -32,7 +31,6 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
{AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
{AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
{AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
{AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
}; };
const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
@ -66,38 +64,18 @@ static const CODEC_TBL_LIST CodecTableList[] =
{(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
}; };
/** void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
* Fch Oem setting callback
*
* Configure platform specific Hudson device,
* such Azalia, SATA, GEC, IMC etc.
*/
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
{ {
AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
if (StdHeader->Func == AMD_INIT_RESET) {
FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); }
FchParams_reset->FchReset.Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
} else if (StdHeader->Func == AMD_INIT_ENV) {
FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
{
/* Azalia Controller OEM Codec Table Pointer */ /* Azalia Controller OEM Codec Table Pointer */
FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]);
/* Azalia Controller Front Panel OEM Table Pointer */
/* Fan Control */
FchParams_env->Imc.ImcEnable = FALSE; FchParams_env->Imc.ImcEnable = FALSE;
FchParams_env->Hwm.HwMonitorEnable = FALSE; FchParams_env->Hwm.HwMonitorEnable = FALSE;
FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */ FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */
/* XHCI configuration */
FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchParams_env->Usb.Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
}
printk(BIOS_DEBUG, "Done\n");
return AGESA_SUCCESS;
} }

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@ -20,7 +20,6 @@ if BOARD_MSI_MS7721
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select AGESA_LEGACY_WRAPPER
select CPU_AMD_AGESA_FAMILY15_TN select CPU_AMD_AGESA_FAMILY15_TN
select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
select SOUTHBRIDGE_AMD_AGESA_HUDSON select SOUTHBRIDGE_AMD_AGESA_HUDSON

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@ -18,7 +18,7 @@
#include "AGESA.h" #include "AGESA.h"
#include "amdlib.h" #include "amdlib.h"
#include <northbridge/amd/agesa/agesawrapper.h> #include <northbridge/amd/agesa/state_machine.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h> #include <PlatformMemoryConfiguration.h>
@ -130,6 +130,13 @@ static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
&DdiList[0] &DdiList[0]
}; };
void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
{
FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchReset->Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
}
/*---------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------*/
/** /**
* OemCustomizeInitEarly * OemCustomizeInitEarly
@ -146,7 +153,7 @@ static const PCIe_COMPLEX_DESCRIPTOR Trinity = {
**/ **/
/*---------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------*/
static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{ {
AGESA_STATUS Status; AGESA_STATUS Status;
VOID *TrinityPcieComplexListPtr; VOID *TrinityPcieComplexListPtr;
@ -197,14 +204,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
((PCIe_COMPLEX_DESCRIPTOR*)TrinityPcieComplexListPtr)->DdiLinkList = (PCIe_DDI_DESCRIPTOR*)TrinityPcieDdiPtr; ((PCIe_COMPLEX_DESCRIPTOR*)TrinityPcieComplexListPtr)->DdiLinkList = (PCIe_DDI_DESCRIPTOR*)TrinityPcieDdiPtr;
InitEarly->GnbConfig.PcieComplexList = TrinityPcieComplexListPtr; InitEarly->GnbConfig.PcieComplexList = TrinityPcieComplexListPtr;
return AGESA_SUCCESS;
}
static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
{
/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
return AGESA_SUCCESS;
} }
/*---------------------------------------------------------------------------------------- /*----------------------------------------------------------------------------------------
@ -218,7 +217,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will * is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings. * use its default conservative settings.
*/ */
CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
@ -232,7 +231,14 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END PSO_END
}; };
const struct OEM_HOOK OemCustomize = {
.InitEarly = OemInitEarly, void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
.InitMid = OemInitMid, {
}; InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
}
void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
{
/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
}

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@ -13,7 +13,7 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <northbridge/amd/agesa/agesawrapper.h> #include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/BiosCallOuts.h>
#include <arch/acpi.h> #include <arch/acpi.h>
@ -45,9 +45,6 @@ static void mainboard_enable(device_t dev)
msr = rdmsr(0xC0011023); msr = rdmsr(0xC0011023);
msr.lo &= ~(1 << 23); msr.lo &= ~(1 << 23);
wrmsr(0xC0011023, msr); wrmsr(0xC0011023, msr);
if (acpi_is_wakeup_s3())
agesawrapper_fchs3earlyrestore();
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {