From a883c95bd8e6623fab12606ae3bd42a687414677 Mon Sep 17 00:00:00 2001 From: David Wu Date: Tue, 3 Jan 2023 12:45:05 +0800 Subject: [PATCH] mb/google/brya/var/kano: Set the ov2740 to 0 and the hi556 to 1 for SSFC When EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG is enabled and SSFC is not set, it will treat missing SSFC as zero, so Kano needs to set the ov2740 to 0 to avoid probing wrong mipi camera. Before patch >fw_config match found: UFC=UFC_MIPI_OVTI2740 >fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S >fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S >fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S >fw_config match found: UFC=UFC_MIPI_OVTI2740 >fw_config match found: ZYDRON_UFC=UFC_MIPI_HI556 >fw_config match found: UFC=UFC_MIPI_OVTI2740 >fw_config match found: STYLUS=STYLUS_PRESENT After patch >fw_config match found: UFC=UFC_MIPI_OVTI2740 >fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S >fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S >fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S >fw_config match found: UFC=UFC_MIPI_OVTI2740 >I2C: 00:20 disabled by fw_config >fw_config match found: UFC=UFC_MIPI_OVTI2740 >fw_config match found: STYLUS=STYLUS_PRESENT BUG=b:262939431 TEST=Boot on kano and check functional with ov2740 camera. Change-Id: I46fac6c820d6006956680a07198db82225630905 Signed-off-by: David Wu Reviewed-on: https://review.coreboot.org/c/coreboot/+/71628 Tested-by: build bot (Jenkins) Reviewed-by: Nick Vaccaro Reviewed-by: Ren Kuo Reviewed-by: Eric Lai --- src/mainboard/google/brya/variants/kano/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index b45fbf7d3d..f1fe5e7413 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -17,8 +17,8 @@ fw_config option STYLUS_PRESENT 1 end field ZYDRON_UFC 36 37 - option UFC_MIPI_HI556 0 - option UFC_MIPI_OVTI2740 1 + option UFC_MIPI_OVTI2740 0 + option UFC_MIPI_HI556 1 end end chip soc/intel/alderlake