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nb/intel/*.h: Remove left-over register definitions 

The code has been moved into drivers folder.

Change-Id: I122affffd5108052ed7a95b34d0d66a6d3279d41
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/23487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Patrick Rudolph 2018-01-29 11:59:01 +01:00 committed by Martin Roth
parent 662b6cb3ed
commit a88697444a
4 changed files with 0 additions and 8 deletions
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2
src/northbridge/intel/fsp_sandybridge/northbridge.h
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@ -109,8 +109,6 @@
/* Device 0:2.0 PCI configuration space (Graphics Device) */
#define MSAC 0x62 /* Multi Size Aperture Control */
#define SWSCI 0xe8 /* SWSCI enable */
#define ASLS 0xfc /* OpRegion Base */
/*
* MCHBAR

2
src/northbridge/intel/haswell/haswell.h
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@ -96,8 +96,6 @@
/* Device 0:2.0 PCI configuration space (Graphics Device) */
#define MSAC 0x62 /* Multi Size Aperture Control */
#define SWSCI 0xe8 /* SWSCI enable */
#define ASLS 0xfc /* OpRegion Base */
/*
* MCHBAR

2
src/northbridge/intel/nehalem/nehalem.h
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@ -195,8 +195,6 @@ typedef struct {
/* Device 0:2.0 PCI configuration space (Graphics Device) */
#define MSAC 0x62 /* Multi Size Aperture Control */
#define SWSCI 0xe8 /* SWSCI enable */
#define ASLS 0xfc /* OpRegion Base */
/*
* MCHBAR

2
src/northbridge/intel/sandybridge/sandybridge.h
View File

@ -114,8 +114,6 @@
/* Device 0:2.0 PCI configuration space (Graphics Device) */
#define MSAC 0x62 /* Multi Size Aperture Control */
#define SWSCI 0xe8 /* SWSCI enable */
#define ASLS 0xfc /* OpRegion Base */
/*
* MCHBAR