soc/amd/stoneyridge: drop empty sb_enable

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I9b6e0bd5c7358e2f18f929d5b098d95acbf59a5c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50437
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-02-09 16:47:09 +01:00
parent e094b1f137
commit a8d4a718e3
3 changed files with 0 additions and 9 deletions

View File

@ -112,9 +112,6 @@ static void enable_dev(struct device *dev)
case DEVICE_PATH_CPU_CLUSTER: case DEVICE_PATH_CPU_CLUSTER:
dev->ops = &cpu_bus_ops; dev->ops = &cpu_bus_ops;
break; break;
case DEVICE_PATH_PCI:
sb_enable(dev);
break;
case DEVICE_PATH_MMIO: case DEVICE_PATH_MMIO:
if (i2c_acpi_name(dev) != NULL) if (i2c_acpi_name(dev) != NULL)
dev->ops = &stoneyridge_i2c_mmio_ops; dev->ops = &stoneyridge_i2c_mmio_ops;

View File

@ -238,7 +238,6 @@ void fch_final(void *chip_info);
void enable_aoac_devices(void); void enable_aoac_devices(void);
void sb_clk_output_48Mhz(u32 osc); void sb_clk_output_48Mhz(u32 osc);
void sb_enable(struct device *dev);
void sb_read_mode(u32 mode); void sb_read_mode(u32 mode);
void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm); void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm);

View File

@ -352,11 +352,6 @@ void bootblock_fch_init(void)
fch_print_pmxc0_status(); fch_print_pmxc0_status();
} }
void sb_enable(struct device *dev)
{
printk(BIOS_DEBUG, "%s\n", __func__);
}
static void fch_init_acpi_ports(void) static void fch_init_acpi_ports(void)
{ {
u32 reg; u32 reg;