commonlib: Add Intel-specific timestamps for before/after sending EOP

Change-Id: I11daebbfc44959f1e498ddac2ee7633e31a1a7d5
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
This commit is contained in:
Tim Wawrzynczak 2021-06-22 19:09:20 -06:00
parent 82eaa21945
commit a8dac049b1
1 changed files with 4 additions and 0 deletions

View File

@ -107,6 +107,8 @@ enum timestamp_id {
/* 940-950 reserved for vendorcode extensions (940-950: Intel ME) */ /* 940-950 reserved for vendorcode extensions (940-950: Intel ME) */
TS_ME_INFORM_DRAM_WAIT = 940, TS_ME_INFORM_DRAM_WAIT = 940,
TS_ME_INFORM_DRAM_DONE = 941, TS_ME_INFORM_DRAM_DONE = 941,
TS_ME_BEFORE_END_OF_POST = 942,
TS_ME_AFTER_END_OF_POST = 943,
/* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */ /* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */
TS_FSP_MEMORY_INIT_START = 950, TS_FSP_MEMORY_INIT_START = 950,
@ -255,6 +257,8 @@ static const struct timestamp_id_to_name {
/* Intel ME related timestamps */ /* Intel ME related timestamps */
{ TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgement of raminit"}, { TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgement of raminit"},
{ TS_ME_INFORM_DRAM_DONE, "finished waiting for ME response"}, { TS_ME_INFORM_DRAM_DONE, "finished waiting for ME response"},
{ TS_ME_BEFORE_END_OF_POST, "before sending EOP to ME"},
{ TS_ME_AFTER_END_OF_POST, "after sending EOP to ME"},
/* FSP related timestamps */ /* FSP related timestamps */
{ TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" }, { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },