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soc/amd/acpi: Add low/no battery mode to DPTC 

Update acpigen_write_alib_dptc() to support "low/no battery mode",
which throttles the SOC when there is no battery connected or the
battery charge is critically low.

This is in preparation for enabling this functionality for Mendocino.

BUG=b:217911928
TEST=Build zork
TEST=Boot nipperkin
TEST=Boot skyrim

Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66804
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Van Patten 2022-08-16 12:09:23 -06:00 committed by Martin L Roth
parent 2d9e96a5ab
commit a90aebbf2a
3 changed files with 42 additions and 0 deletions
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12
src/soc/amd/common/acpi/dptc.asl
View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
External(\_SB.DDEF, MethodObj)
External(\_SB.DTHL, MethodObj)
External(\_SB.DTAB, MethodObj)
Scope (\_SB)
@ -13,6 +14,17 @@ Scope (\_SB)
Return (Zero)
}
/* If _SB.DTHL is not present, then DPTC Tablet Mode is not enabled.
* Throttle the SOC if the battery is not present (BTEX), the battery level is critical
* (BFCR), or the battery is cutoff (BFCT). */
If (CondRefOf (\_SB.DTHL) &&
(!\_SB.PCI0.LPCB.EC0.BTEX || \_SB.PCI0.LPCB.EC0.BFCR || \_SB.PCI0.LPCB.EC0.BFCT))
{
\_SB.DTHL()
Return (Zero)
}
/* If _SB.DTAB is not present, then DPTC Tablet Mode is not enabled. */
If (CondRefOf (\_SB.DTAB) && (\_SB.PCI0.LPCB.EC0.TBMD == One))
{
\_SB.DTAB()

29
src/soc/amd/common/block/acpi/alib.c
View File

@ -45,6 +45,35 @@ void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_para
acpigen_write_scope_end();
}
void acpigen_write_alib_dptc_no_battery(uint8_t *no_battery_param, size_t no_battery_param_len)
{
/* Scope (\_SB) */
acpigen_write_scope("\\_SB");
/* Low/No Battery Mode */
/* Scope (\_SB)
* {
* Method (DTHL, 0, Serialized)
* {
* Debug = "DPTC: Using low/no battery mode SOC DPTC settings."
* Name (THTL, Buffer (0x25)
* {
* ...
* })
* \_SB.ALIB
* 0x0C
* THTL
* }
* }
*/
acpigen_write_method_serialized("DTHL", 0);
acpigen_write_debug_string("DPTC: Using low/no battery mode SOC DPTC settings.");
acpigen_dptc_call_alib("THTL", no_battery_param, no_battery_param_len);
acpigen_write_method_end();
acpigen_write_scope_end();
}
void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len)
{
/* Scope (\_SB) */

1
src/soc/amd/common/block/include/amdblocks/alib.h
View File

@ -28,6 +28,7 @@ struct alib_dptc_param {
} __packed;
void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_param_len);
void acpigen_write_alib_dptc_no_battery(uint8_t *no_battery_param, size_t no_battery_param_len);
void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len);
#endif /* !__ACPI__ */