- See Issue Tracker id-9 "lnxi-patch-9".
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -49,6 +49,7 @@ uses HOSTCC
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uses OBJCOPY
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uses OBJCOPY
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uses CONFIG_CONSOLE_VGA
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uses CONFIG_CONSOLE_VGA
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uses CONFIG_PCI_ROM_RUN
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uses CONFIG_PCI_ROM_RUN
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uses CONFIG_LOGICAL_CPUS
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uses CONFIG_USE_INIT
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uses CONFIG_USE_INIT
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@ -56,6 +57,11 @@ uses CONFIG_USE_INIT
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### Build options
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### Build options
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###
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###
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##
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## CONFIG_LOGICAL_CPUS enables dual core support
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##
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default CONFIG_LOGICAL_CPUS=1
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##
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##
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## ROM_SIZE is the size of boot ROM that this board will use.
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## ROM_SIZE is the size of boot ROM that this board will use.
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##
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##
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@ -105,7 +111,7 @@ default LB_CKS_LOC=123
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## Only worry about 2 micro processors
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## Only worry about 2 micro processors
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##
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##
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default CONFIG_SMP=1
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default CONFIG_SMP=1
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default CONFIG_MAX_CPUS=2
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default CONFIG_MAX_CPUS=4
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default CONFIG_MAX_PHYSICAL_CPUS=2
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default CONFIG_MAX_PHYSICAL_CPUS=2
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##
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##
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@ -32,6 +32,7 @@ entries
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395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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399 1 e 2 dual_core
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400 1 e 1 power_on_after_fail
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400 1 e 1 power_on_after_fail
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412 4 e 6 debug_level
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412 4 e 6 debug_level
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416 4 e 7 boot_first
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416 4 e 7 boot_first
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