- See Issue Tracker id-9 "lnxi-patch-9".

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jason Schildt 2005-10-25 21:33:00 +00:00
parent 24ca17e3ea
commit a922bac99c
2 changed files with 8 additions and 1 deletions

View File

@ -49,6 +49,7 @@ uses HOSTCC
uses OBJCOPY uses OBJCOPY
uses CONFIG_CONSOLE_VGA uses CONFIG_CONSOLE_VGA
uses CONFIG_PCI_ROM_RUN uses CONFIG_PCI_ROM_RUN
uses CONFIG_LOGICAL_CPUS
uses CONFIG_USE_INIT uses CONFIG_USE_INIT
@ -56,6 +57,11 @@ uses CONFIG_USE_INIT
### Build options ### Build options
### ###
##
## CONFIG_LOGICAL_CPUS enables dual core support
##
default CONFIG_LOGICAL_CPUS=1
## ##
## ROM_SIZE is the size of boot ROM that this board will use. ## ROM_SIZE is the size of boot ROM that this board will use.
## ##
@ -105,7 +111,7 @@ default LB_CKS_LOC=123
## Only worry about 2 micro processors ## Only worry about 2 micro processors
## ##
default CONFIG_SMP=1 default CONFIG_SMP=1
default CONFIG_MAX_CPUS=2 default CONFIG_MAX_CPUS=4
default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_MAX_PHYSICAL_CPUS=2
## ##

View File

@ -32,6 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first