diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig
index 93bfb02601..7f96cbe820 100644
--- a/src/mainboard/lenovo/x201/Kconfig
+++ b/src/mainboard/lenovo/x201/Kconfig
@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
 	select SUPERIO_NSC_PC87382
 	select DRIVERS_LENOVO_WACOM
+	select MAINBOARD_HAS_LPC_TPM
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index d8929269ab..f87ab1069c 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -153,6 +153,9 @@ chip northbridge/intel/nehalem
 					# DLPC, not connected
 					device pnp 164e.19 off end
 				end
+				chip drivers/pc80/tpm
+					device pnp 0c31.0 on end
+				end
 			end
 			device pci 1f.2 on # IDE/SATA
 				subsystemid 0x17aa 0x2168
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index 20d647effa..dab66e4c0a 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -87,6 +87,14 @@ DefinitionBlock(
 		}
 	}
 
+/*
+ * LPC Trusted Platform Module
+ */
+Scope (\_SB.PCI0.LPCB)
+{
+       #include <drivers/pc80/tpm/acpi/tpm.asl>
+}
+
 	/* Chipset specific sleep states */
 	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
 
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 8d1289035f..1e335d33ec 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -37,6 +37,7 @@
 #include <timestamp.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
+#include <tpm.h>
 
 #include "gpio.h"
 #include "dock.h"
@@ -306,5 +307,9 @@ void main(unsigned long bist)
 	}
 #endif
 
+#if CONFIG_LPC_TPM
+	init_tpm(s3resume);
+#endif
+
 	timestamp_add_now(TS_END_ROMSTAGE);
 }