diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 86e937e569..aad4eb9efa 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -69,6 +69,13 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0xBB, byte);
 
 	rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY);
+
+	/* Initialize the real time clock.
+	 * The 0 argument tells rtc_init not to
+	 * update CMOS unless it is invalid.
+	 * 1 tells rtc_init to always initialize the CMOS.
+	 */
+	rtc_init(0);
 }
 
 static void hudson_lpc_read_resources(device_t dev)
diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c
index be2b8cd863..4c5dde9199 100644
--- a/src/southbridge/amd/cimx/sb700/late.c
+++ b/src/southbridge/amd/cimx/sb700/late.c
@@ -79,6 +79,13 @@ static void lpc_init(device_t dev)
 
 	rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY);
 
+	/* Initialize the real time clock.
+	 * The 0 argument tells rtc_init not to
+	 * update CMOS unless it is invalid.
+	 * 1 tells rtc_init to always initialize the CMOS.
+	 */
+	rtc_init(0);
+
 	printk(BIOS_DEBUG, "SB700 - Late.c - lpc_init - End.\n");
 }
 
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c
index 85485edfb6..65cea695ae 100644
--- a/src/southbridge/amd/cimx/sb900/late.c
+++ b/src/southbridge/amd/cimx/sb900/late.c
@@ -101,6 +101,13 @@ static void lpc_init(device_t dev)
 //-	hpetInit(sb_config, &(sb_config->BuildParameters));
 	rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY);
 
+	/* Initialize the real time clock.
+	 * The 0 argument tells rtc_init not to
+	 * update CMOS unless it is invalid.
+	 * 1 tells rtc_init to always initialize the CMOS.
+	 */
+	rtc_init(0);
+
 	printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - End.\n");
 }