mb/google/brya/variants/gimble: init overridetree for gimble
init overridetree.cb based on the schematic carbine_adl-p_proto_20210618_proto final.pdf BUG=b:191213263 TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error. Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> Change-Id: I3f6875ef438b147436605629445d346a56896a87 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55781 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Mark Hsieh
Tim Wawrzynczak
parent
4b3ad7d677
commit
a96e9cb0b4
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@ -17,3 +17,5 @@ config BOARD_GOOGLE_GIMBLE
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bool "-> Gimble"
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select BOARD_GOOGLE_BASEBOARD_BRYA
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select BASEBOARD_BRYA_LAPTOP
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select CHROMEOS_DSM_CALIB if CHROMEOS
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select DRIVERS_I2C_MAX98390
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@ -2,3 +2,5 @@
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bootblock-y += gpio.c
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ramstage-y += gpio.c
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ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
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@ -0,0 +1,56 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootstate.h>
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#include <console/console.h>
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#include <fw_config.h>
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#include <gpio.h>
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static const struct pad_config dmic_enable_pads[] = {
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PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* DMIC_CLK0_R */
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PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* DMIC_DATA0_R */
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};
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static const struct pad_config dmic_disable_pads[] = {
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PAD_NC(GPP_S2, NONE),
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PAD_NC(GPP_S3, NONE),
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};
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static const struct pad_config i2s_enable_pads[] = {
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PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), /* I2S_HP_SCLK_R */
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PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* I2S_HP_SFRM_R */
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PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), /* I2S_PCH_TX_HP_RX_STRAP */
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PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* I2S_PCH_RX_HP_TX */
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PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2), /* I2S_SPKR_SCLK_R */
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PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2), /* I2S_SPKR_SFRM_R */
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PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* I2S_PCH_TX_SPKR_RX_R */
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PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), /* I2S_PCH_RX_SPKR_TX */
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};
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static const struct pad_config i2s_disable_pads[] = {
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PAD_NC(GPP_R0, NONE),
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PAD_NC(GPP_R1, NONE),
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PAD_NC(GPP_R2, NONE),
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PAD_NC(GPP_R3, NONE),
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PAD_NC(GPP_R4, NONE),
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PAD_NC(GPP_R5, NONE),
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PAD_NC(GPP_R6, NONE),
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PAD_NC(GPP_R7, NONE),
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};
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static void fw_config_handle(void *unused)
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{
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if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
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printk(BIOS_INFO, "Disable audio related GPIO pins.\n");
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gpio_configure_pads(i2s_disable_pads, ARRAY_SIZE(i2s_disable_pads));
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gpio_configure_pads(dmic_disable_pads, ARRAY_SIZE(dmic_disable_pads));
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return;
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}
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if (fw_config_probe(FW_CONFIG(AUDIO, MAX98390_ALC5682I_I2S))) {
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printk(BIOS_INFO, "Configure audio over I2S with MAX98390 ALC5682I.\n");
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gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads));
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gpio_configure_pads(i2s_enable_pads, ARRAY_SIZE(i2s_enable_pads));
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}
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
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@ -1,6 +1,281 @@
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chip soc/intel/alderlake
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device domain 0 on
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end
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fw_config
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field DB_USB 0 3
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option USB_ABSENT 0
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option USB3_PS8815 1
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end
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field DB_SD 4 5
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option SD_ABSENT 0
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option SD_GL9750H 1
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end
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field KB_BL 7 7
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option KB_BL_ABSENT 0
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option KB_BL_PRESENT 1
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end
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field AUDIO 8 10
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option AUDIO_UNKNOWN 0
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option MAX98390_ALC5682I_I2S 1
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end
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field DB_LTE 11 12
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option LTE_ABSENT 0
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end
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end
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chip soc/intel/alderlake
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register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2_C2
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register "usb2_ports[3]" = "USB2_PORT_EMPTY" # M.2 WWAN
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register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
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register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Type-A DB Port
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
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device domain 0 on
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DRAM""
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register "options.tsr[1].desc" = ""Charger""
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# TODO: below values are initial reference values only
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## Active Policy
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register "policies.active" = "{
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[0] = {
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.target = DPTF_CPU,
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.thresholds = {
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TEMP_PCT(85, 90),
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TEMP_PCT(80, 80),
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TEMP_PCT(75, 70),
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}
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}
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}"
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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}"
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 3000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 55000,
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.max_power = 55000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{
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[0] = { 90, 6700, 220, 2200, },
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[1] = { 80, 5800, 180, 1800, },
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[2] = { 70, 5000, 145, 1450, },
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[3] = { 60, 4900, 115, 1150, },
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[4] = { 50, 3838, 90, 900, },
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[5] = { 40, 2904, 55, 550, },
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[6] = { 30, 2337, 30, 300, },
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[7] = { 20, 1608, 15, 150, },
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[8] = { 10, 800, 10, 100, },
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[9] = { 0, 0, 0, 50, }
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}"
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## Fan options
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 on end
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end
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end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "GPE0_PME_B0"
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device generic 0 on end
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end
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end
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device ref pcie_rp8 on
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chip soc/intel/common/block/pcie/rtd3
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
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register "srcclk_pin" = "3"
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device generic 0 on end
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end
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end #PCIE8 SD card
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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register "name" = ""RT58""
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register "desc" = ""Headset Codec""
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
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# Set the jd_src to RT5668_JD1 for jack detection
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register "property_count" = "1"
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register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
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register "property_list[0].name" = ""realtek,jd-src""
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register "property_list[0].integer" = "1"
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device i2c 1a on
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probe AUDIO MAX98390_ALC5682I_I2S
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end
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end
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end #I2C0
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device ref i2c1 on
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chip drivers/i2c/hid
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register "generic.hid" = ""GDIX0000""
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register "generic.desc" = ""Goodix Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
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register "generic.reset_delay_ms" = "120"
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register "generic.reset_off_delay_ms" = "3"
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register "generic.enable_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
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register "generic.enable_delay_ms" = "12"
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register "generic.stop_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
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register "generic.stop_off_delay_ms" = "1"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 0x5d on end
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end
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end
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device ref i2c5 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
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register "wake" = "GPE0_DW2_14"
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register "probed" = "1"
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device i2c 0x15 on end
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end
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end
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device ref hda on
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chip drivers/i2c/max98390
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register "desc" = ""MAX98390 Speaker Amp 0""
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register "uid" = "0"
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register "name" = ""MXW0""
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register "r0_calib_key" = ""dsm_calib_r0_0""
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register "temperature_calib_key" = ""dsm_calib_temp_0""
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device i2c 0x70 on end
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end
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chip drivers/i2c/max98390
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register "desc" = ""MAX98390 Speaker Amp 1""
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register "uid" = "1"
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register "name" = ""MXW1""
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register "r0_calib_key" = ""dsm_calib_r0_1""
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register "temperature_calib_key" = ""dsm_calib_temp_1""
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device i2c 0x72 on end
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end
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end
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device ref gspi1 on
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chip drivers/spi/acpi
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register "name" = ""CRFP""
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register "hid" = "ACPI_DT_NAMESPACE_HID"
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register "uid" = "1"
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register "compat_string" = ""google,cros-ec-spi""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
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register "wake" = "GPE0_DW2_15"
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device spi 0 on end
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end # FPMCU
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end
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device ref pch_espi on
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chip ec/google/chromeec
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use conn0 as mux_conn[0]
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use conn1 as mux_conn[1]
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use conn2 as mux_conn[2]
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device pnp 0c09.0 on end
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end
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end
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device ref pmc hidden
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chip drivers/intel/pmc_mux
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device generic 0 on
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chip drivers/intel/pmc_mux/conn
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register "usb2_port_number" = "1"
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register "usb3_port_number" = "1"
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device generic 0 alias conn0 on end
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end
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chip drivers/intel/pmc_mux/conn
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register "usb2_port_number" = "2"
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register "usb3_port_number" = "2"
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device generic 1 alias conn1 on end
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end
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chip drivers/intel/pmc_mux/conn
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register "usb2_port_number" = "3"
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register "usb3_port_number" = "3"
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device generic 2 alias conn2 on end
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end
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end
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end
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end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device ref tcss_usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device ref tcss_usb3_port2 on end
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end
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end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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register "privacy_gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_D13)"
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port (MLB)""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(4, 1)"
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device ref usb2_port8 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
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device ref usb2_port10 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port (MLB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(4, 1)"
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device ref usb3_port2 on end
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end
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end
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end
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end
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end
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end
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