mb/google/volteer/variants: Update Power Limit2 minimum value
Update Power Limit2 (PL2) minimum value to the same as maximum value for volteer variants like baseboard, delbin, eldrid, terrador and todor. All other variants uses the DTT entries from baseboard devicetree since there is no override present for those variants. DTT does not throttle PL2, so this minimum value change here does not impact any existing behavior on the system. BUG=None BRANCH=volteer TEST=Build and test on volteer system Change-Id: I568e87c87ef517e96eaab3ff144b1674d26ae1e6 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
parent
62d73b6be5
commit
a97fb7f960
|
@ -401,7 +401,7 @@ chip soc/intel/tigerlake
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
.granularity = 200,},
|
.granularity = 200,},
|
||||||
.pl2 = {.min_power = 15000,
|
.pl2 = {.min_power = 60000,
|
||||||
.max_power = 60000,
|
.max_power = 60000,
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
|
|
|
@ -102,7 +102,7 @@ chip soc/intel/tigerlake
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
.granularity = 200,},
|
.granularity = 200,},
|
||||||
.pl2 = {.min_power = 15000,
|
.pl2 = {.min_power = 51000,
|
||||||
.max_power = 51000,
|
.max_power = 51000,
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
|
|
|
@ -102,7 +102,7 @@ chip soc/intel/tigerlake
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
.granularity = 200,},
|
.granularity = 200,},
|
||||||
.pl2 = {.min_power = 15000,
|
.pl2 = {.min_power = 51000,
|
||||||
.max_power = 51000,
|
.max_power = 51000,
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
|
|
|
@ -48,7 +48,7 @@ chip soc/intel/tigerlake
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
.granularity = 200,},
|
.granularity = 200,},
|
||||||
.pl2 = {.min_power = 9000,
|
.pl2 = {.min_power = 40000,
|
||||||
.max_power = 40000,
|
.max_power = 40000,
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
|
|
|
@ -50,7 +50,7 @@ chip soc/intel/tigerlake
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
.granularity = 200,},
|
.granularity = 200,},
|
||||||
.pl2 = {.min_power = 9000,
|
.pl2 = {.min_power = 40000,
|
||||||
.max_power = 40000,
|
.max_power = 40000,
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
|
|
Loading…
Reference in New Issue