mb/google/brya/var/felwinter: Update USB Type-C PLD
After kernel change landed on Chromium tree. https://lore.kernel.org/r/20210407065555.88110-5-heikki.krogerus@linux.intel.com USB driver will use PLD to match the Type-C port. PLD needs to start from 1. BUG=b:214460183 TEST=boot into OS without kernel panic. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I1493e46f8881b2f688f41f32755d4cf5a87e7656 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61108 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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@ -327,13 +327,13 @@ chip soc/intel/alderlake
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device ref tcss_usb3_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C2 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(3, 1)"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device ref tcss_usb3_port3 on end
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end
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end
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@ -345,13 +345,13 @@ chip soc/intel/alderlake
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C2 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(3, 1)"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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