soc/amd/sabrina, mb/google/skyrim: Call espi_switch_to_spi1_pads

Skyrim uses second SPI pads for ESPI. Switch to it initialize ESPI in
verstage.

BUG=b:217414563
TEST=Build Skyrim BIOS image. Ensure that ESPI init is successful in PSP
verstage.

Change-Id: I6e3462e95c50d256b6c159ae1d854dd69a538bb0
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>

src/mainboard/google/skyrim/verstage.c

@@ -6,6 +6,7 @@
 #include <baseboard/variants.h>
 #include <psp_verstage.h>
 #include <security/vboot/vboot_common.h>
+#include <soc/espi.h>
 #include <soc/southbridge.h>
 
 void verstage_mainboard_early_init(void)
@@ -25,6 +26,8 @@ void verstage_mainboard_espi_init(void)
 
 	variant_espi_gpio_table(&gpios, &num_gpios);
 	gpio_configure_pads(gpios, num_gpios);
+
+	espi_switch_to_spi1_pads();
 }
 
 void verstage_mainboard_tpm_init(void)

src/soc/amd/sabrina/Makefile.inc

@@ -19,6 +19,7 @@ bootblock-y	+= reset.c
 bootblock-y	+= uart.c
 
 verstage-y	+= i2c.c
+verstage-y	+= espi_util.c
 verstage_x86-y	+= gpio.c
 verstage_x86-y	+= reset.c
 verstage_x86-y	+= uart.c