mb/google/brya/variants/gimble: Update DPTF sensors
Add two thermal sensors for fan and charger for DPTF based thermal control. BUG=b:199180746 TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error. Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> Change-Id: I1529dd5dff3445dd499ed665386a9b06d67c7028 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57833 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -34,20 +34,21 @@ chip soc/intel/alderlake
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DRAM""
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register "options.tsr[1].desc" = ""Charger""
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register "options.tsr[1].desc" = ""Fan""
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register "options.tsr[2].desc" = ""Charger""
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# TODO: below values are initial reference values only
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
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}"
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register "controls.power_limits" = "{
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.pl1 = {
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