From a9b08f2b61c02c7cc5739280430e4906df060339 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 1 Aug 2023 12:29:02 -0700 Subject: [PATCH] mb/google/rex/variants/ovis: Use and configure RT8168 driver This makes sure google/ovis don't get a random mac address on boot. Additionally, program the LAN WAKE GPIO properly as per the Ovis schematics dated July'23. BUG=b:293905992 TEST=Verified on google/ovis that able to get the fixed MAC address across the power cycles. Change-Id: I699e52e25f851de325f96ef885e04d15ca64badd Signed-off-by: Stefan Reinauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/76872 Reviewed-by: Jakub Czapiga Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal --- src/mainboard/google/rex/Kconfig | 3 +++ .../rex/variants/baseboard/ovis/devicetree.cb | 2 +- src/mainboard/google/rex/variants/ovis/gpio.c | 2 +- .../google/rex/variants/ovis/overridetree.cb | 15 +++++++++++++++ 4 files changed, 20 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index 442b809b64..08382cb9bf 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -68,6 +68,9 @@ config BOARD_GOOGLE_BASEBOARD_OVIS select HAVE_SLP_S0_GATE select MAINBOARD_HAS_CHROMEOS select MEMORY_SOLDERDOWN + select RT8168_GEN_ACPI_POWER_RESOURCE + select RT8168_GET_MAC_FROM_VPD + select RT8168_SET_LED_MODE select SOC_INTEL_IOE_DIE_SUPPORT select SOC_INTEL_METEORLAKE_U_H select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb index 25befb4dd4..75fef6d521 100644 --- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb @@ -1,7 +1,7 @@ chip soc/intel/meteorlake # GPE configuration - register "pmc_gpe0_dw0" = "GPP_B" + register "pmc_gpe0_dw0" = "GPP_D" register "pmc_gpe0_dw1" = "GPP_E" register "pmc_gpe0_dw2" = "GPP_F" diff --git a/src/mainboard/google/rex/variants/ovis/gpio.c b/src/mainboard/google/rex/variants/ovis/gpio.c index db6f7aa0c8..c2dd8281fe 100644 --- a/src/mainboard/google/rex/variants/ovis/gpio.c +++ b/src/mainboard/google/rex/variants/ovis/gpio.c @@ -185,7 +185,7 @@ static const struct pad_config gpio_table[] = { /* GPP_D17 : [] ==> I2S_SOC_RX_HP_TX */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF2), /* GPP_D18 : [] ==> LAN_PE_WAKE_ODL */ - PAD_CFG_GPI_APIC_LOCK(GPP_D18, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_SCI_LOW(GPP_D18, NONE, DEEP, EDGE_SINGLE), /* GPP_D19 : [] ==> SSD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), /* GPP_D20 : [] ==> LAN_CLKREQ_ODL */ diff --git a/src/mainboard/google/rex/variants/ovis/overridetree.cb b/src/mainboard/google/rex/variants/ovis/overridetree.cb index de86a55ce8..f8bc09b700 100644 --- a/src/mainboard/google/rex/variants/ovis/overridetree.cb +++ b/src/mainboard/google/rex/variants/ovis/overridetree.cb @@ -62,7 +62,15 @@ chip soc/intel/meteorlake .clk_req = 2, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + chip drivers/net + register "customized_leds" = "0x05af" + register "wake" = "GPE0_DW0_18" + register "device_index" = "0" + register "add_acpi_dma_property" = "true" + device pci 00.0 on end + end end #PCIE7 LAN1 card + device ref pcie_rp10 on # Enable LAN0 Card PCIE 10 using clk 8 register "pcie_rp[PCH_RP(10)]" = "{ @@ -70,6 +78,13 @@ chip soc/intel/meteorlake .clk_req = 8, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + chip drivers/net + register "customized_leds" = "0x05af" + register "wake" = "GPE0_DW0_18" + register "device_index" = "0" + register "add_acpi_dma_property" = "true" + device pci 00.0 on end + end end #PCIE10 LAN0 card device ref pcie_rp11 on # Enable SSD Card PCIE 11 using clk 7