google/glados: Enable TPM PIRQ

Enable the config option for TPM to use PIRQ instead of SERIRQ
and enable the MAINBOARD_HAS_LPC_TPM option.

BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I990901117a2c478045c403f1039d6eedfc278255
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 44ecaaae1eb482ef5d4cf1e051de4571cc4441be
Original-Change-Id: I115d468c72c3fd015abdddffdd1626368bfedb6e
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/304925
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12148
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2015-10-09 09:22:42 -07:00 committed by Patrick Georgi
parent 8b11b2c4df
commit a9ba459550
1 changed files with 5 additions and 0 deletions

View File

@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_LPC_TPM
select MARK_GRAPHICS_MEM_WRCOMB select MARK_GRAPHICS_MEM_WRCOMB
select MMCONF_SUPPORT select MMCONF_SUPPORT
select MONOTONIC_TIMER_MSR select MONOTONIC_TIMER_MSR
@ -48,6 +49,10 @@ config MAX_CPUS
int int
default 8 default 8
config TPM_PIRQ
hex
default 0x18 # GPP_E0_IRQ
config VBOOT_RAMSTAGE_INDEX config VBOOT_RAMSTAGE_INDEX
hex hex
default 0x3 default 0x3