google/kahlee: Remove AMD IMC

Kahlee does not use the AMD IMC. Remove the files and calls.

Change-Id: Ia837551b592b4f473eb38c06c516586fb6c95c88
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19832
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marshall Dawson 2017-06-23 13:05:09 -06:00 committed by Martin Roth
parent 83367c4483
commit a9d3d65a92
6 changed files with 0 additions and 207 deletions

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@ -16,7 +16,6 @@
#include <AGESA.h>
#include <BiosCallOuts.h>
#include <FchPlatform.h>
#include <soc/imc.h>
#include <soc/hudson.h>
#include <stdlib.h>
@ -27,8 +26,6 @@ static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
if (StdHeader->Func == AMD_INIT_ENV) {
FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))
oem_fan_control(FchParams_env);
/* XHCI configuration */
if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))

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@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_8192
select GFXUMA
select STONEYRIDGE_IMC_FWM
select STONEYRIDGE_UART
config MAINBOARD_DIR

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@ -21,4 +21,3 @@ romstage-y += OemCustomize.c
ramstage-y += BiosCallOuts.c
ramstage-y += OemCustomize.c
ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += fchec.c

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@ -1,110 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
//BTDC Due to IMC Fan, ACPI control codes
OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
Field(IMIO , ByteAcc, NoLock, Preserve) {
IMCX,8,
IMCA,8
}
IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) {
Offset(0x80),
MSTI, 8,
MITS, 8,
MRG0, 8,
MRG1, 8,
MRG2, 8,
MRG3, 8,
}
Method(WACK, 0)
{
Store(0, Local0)
While (LNotEqual(Local0, 0xFA)) {
Store(MRG0, Local0)
Sleep(10)
}
}
//Init
Method (ITZE, 0)
{
Store(0, MRG0)
Store(0xB5, MRG1)
Store(0, MRG2)
Store(0x96, MSTI)
WACK()
Store(0, MRG0)
Store(0, MRG1)
Store(0, MRG2)
Store(0x80, MSTI)
WACK()
Or(MRG2, 0x01, Local0)
Store(0, MRG0)
Store(0, MRG1)
Store(Local0, MRG2)
Store(0x81, MSTI)
WACK()
}
//Sleep
Method (IMSP, 0)
{
Store(0, MRG0)
Store(0xB5, MRG1)
Store(0, MRG2)
Store(0x96, MSTI)
WACK()
Store(0, MRG0)
Store(1, MRG1)
Store(0, MRG2)
Store(0x98, MSTI)
WACK()
Store(0, MRG0)
Store(0xB4, MRG1)
Store(0, MRG2)
Store(0x96, MSTI)
WACK()
}
//Wake
Method (IMWK, 0)
{
Store(0, MRG0)
Store(0xB5, MRG1)
Store(0, MRG2)
Store(0x96, MSTI)
WACK()
Store(0, MRG0)
Store(0, MRG1)
Store(0, MRG2)
Store(0x80, MSTI)
WACK()
Or(MRG2, 0x01, Local0)
Store(0, MRG0)
Store(0, MRG1)
Store(Local0, MRG2)
Store(0x81, MSTI)
WACK()
}

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@ -1,65 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "fchec.h"
void agesawrapper_fchecfancontrolservice(void)
{
FCH_DATA_BLOCK LateParams;
/* Thermal Zone Parameter */
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d;
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0xc6;
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04;
/* SMBUS Address for SMBUS based temperature sensor */
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x98;
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01;
/* PWM steping rate in unit of PWM level percentage */
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01;
LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
/* IMC Fan Policy temperature thresholds */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x3c; /*AC0 threshold */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x28; /*AC1 in oC */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0xff; /*AC2 in oC */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 undefined */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 undefined */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 undefined */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 undefined */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 undefined */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*crit threshold */
LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
/* IMC Fan Policy PWM Settings */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x50; /* AL0 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x32; /* AL1 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0xff; /* AL2 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percent */
LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percent */
LateParams.Imc.EcStruct.IMCFUNSupportBitMap = 0x111;
FchECfancontrolservice(&LateParams);
}

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@ -1,27 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef GOOGLE_KAHLEE_FCHEC
#define GOOGLE_KAHLEE_FCHEC
#include <soc/imc.h>
#include "Porting.h"
#include "AGESA.h"
#include "FchCommonCfg.h"
extern VOID FchECfancontrolservice (IN VOID *FchDataPtr);
void agesawrapper_fchecfancontrolservice(void);
#endif