google/kahlee: Remove AMD IMC
Kahlee does not use the AMD IMC. Remove the files and calls. Change-Id: Ia837551b592b4f473eb38c06c516586fb6c95c88 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19832 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -16,7 +16,6 @@
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#include <AGESA.h>
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#include <AGESA.h>
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#include <BiosCallOuts.h>
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#include <BiosCallOuts.h>
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#include <FchPlatform.h>
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#include <FchPlatform.h>
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#include <soc/imc.h>
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#include <soc/hudson.h>
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#include <soc/hudson.h>
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#include <stdlib.h>
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#include <stdlib.h>
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@ -27,8 +26,6 @@ static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
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if (StdHeader->Func == AMD_INIT_ENV) {
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if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))
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oem_fan_control(FchParams_env);
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/* XHCI configuration */
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/* XHCI configuration */
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if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
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if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
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@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192
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select GFXUMA
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select GFXUMA
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select STONEYRIDGE_IMC_FWM
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select STONEYRIDGE_UART
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select STONEYRIDGE_UART
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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@ -21,4 +21,3 @@ romstage-y += OemCustomize.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += OemCustomize.c
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ramstage-y += OemCustomize.c
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ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += fchec.c
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@ -1,110 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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//BTDC Due to IMC Fan, ACPI control codes
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OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
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Field(IMIO , ByteAcc, NoLock, Preserve) {
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IMCX,8,
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IMCA,8
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}
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IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) {
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Offset(0x80),
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MSTI, 8,
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MITS, 8,
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MRG0, 8,
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MRG1, 8,
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MRG2, 8,
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MRG3, 8,
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}
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Method(WACK, 0)
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{
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Store(0, Local0)
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While (LNotEqual(Local0, 0xFA)) {
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Store(MRG0, Local0)
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Sleep(10)
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}
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}
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//Init
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Method (ITZE, 0)
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{
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Store(0, MRG0)
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Store(0xB5, MRG1)
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Store(0, MRG2)
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Store(0x96, MSTI)
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WACK()
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Store(0, MRG0)
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Store(0, MRG1)
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Store(0, MRG2)
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Store(0x80, MSTI)
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WACK()
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Or(MRG2, 0x01, Local0)
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Store(0, MRG0)
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Store(0, MRG1)
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Store(Local0, MRG2)
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Store(0x81, MSTI)
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WACK()
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}
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//Sleep
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Method (IMSP, 0)
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{
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Store(0, MRG0)
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Store(0xB5, MRG1)
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Store(0, MRG2)
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Store(0x96, MSTI)
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WACK()
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Store(0, MRG0)
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Store(1, MRG1)
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Store(0, MRG2)
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Store(0x98, MSTI)
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WACK()
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Store(0, MRG0)
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Store(0xB4, MRG1)
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Store(0, MRG2)
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Store(0x96, MSTI)
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WACK()
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}
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//Wake
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Method (IMWK, 0)
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{
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Store(0, MRG0)
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Store(0xB5, MRG1)
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Store(0, MRG2)
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Store(0x96, MSTI)
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WACK()
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Store(0, MRG0)
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Store(0, MRG1)
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Store(0, MRG2)
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Store(0x80, MSTI)
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WACK()
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Or(MRG2, 0x01, Local0)
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Store(0, MRG0)
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Store(0, MRG1)
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Store(Local0, MRG2)
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Store(0x81, MSTI)
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WACK()
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}
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@ -1,65 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "fchec.h"
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void agesawrapper_fchecfancontrolservice(void)
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{
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FCH_DATA_BLOCK LateParams;
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/* Thermal Zone Parameter */
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d;
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0xc6;
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04;
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/* SMBUS Address for SMBUS based temperature sensor */
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x98;
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01;
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/* PWM steping rate in unit of PWM level percentage */
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01;
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LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
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/* IMC Fan Policy temperature thresholds */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x3c; /*AC0 threshold */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x28; /*AC1 in oC */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0xff; /*AC2 in oC */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 undefined */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 undefined */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 undefined */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 undefined */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 undefined */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*crit threshold */
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LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
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/* IMC Fan Policy PWM Settings */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x50; /* AL0 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x32; /* AL1 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0xff; /* AL2 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percent */
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LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percent */
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LateParams.Imc.EcStruct.IMCFUNSupportBitMap = 0x111;
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FchECfancontrolservice(&LateParams);
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}
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@ -1,27 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef GOOGLE_KAHLEE_FCHEC
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#define GOOGLE_KAHLEE_FCHEC
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#include <soc/imc.h>
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#include "Porting.h"
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#include "AGESA.h"
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#include "FchCommonCfg.h"
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extern VOID FchECfancontrolservice (IN VOID *FchDataPtr);
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void agesawrapper_fchecfancontrolservice(void);
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#endif
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