soc/mediatek/mt8186: Inititalize ADSP

To use SOF correctly, we need to initialize ADSP in coreboot stage.

TEST=SOF driver is functional.
BUG=b:204229221

Change-Id: I45db587252ccdcdf75e0be2029743034a79925c5
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68289
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tinghan Shen 2022-10-11 13:42:44 +08:00 committed by Felix Held
parent 55a1ba3043
commit a9e595770f
5 changed files with 39 additions and 0 deletions

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@ -27,6 +27,7 @@ romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c
romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
ramstage-y += adsp.c
ramstage-y += ../common/auxadc.c ramstage-y += ../common/auxadc.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += ../common/ddp.c ddp.c ramstage-y += ../common/ddp.c ddp.c

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@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/mmio.h>
#include <soc/addressmap.h>
#include <soc/adsp.h>
void mtk_adsp_init(void)
{
/* [0] CORE_CLK_EN, [1] COREDBG_EN, [3] TIMER_EN, [4] DMA_EN, [5] UART_EN */
setbits32(&mt8186_audiodsp->audiodsp_adsp_ck_en, 0x0000003B);
}

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@ -50,6 +50,7 @@ enum {
DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000,
SSPM_SRAM_BASE = IO_PHYS + 0x00400000, SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
SSPM_CFG_BASE = IO_PHYS + 0x00440000, SSPM_CFG_BASE = IO_PHYS + 0x00440000,
AUDIODSP_BASE = IO_PHYS + 0x00680000,
SFLASH_REG_BASE = IO_PHYS + 0x01000000, SFLASH_REG_BASE = IO_PHYS + 0x01000000,
AUXADC_BASE = IO_PHYS + 0x01001000, AUXADC_BASE = IO_PHYS + 0x01001000,
UART0_BASE = IO_PHYS + 0x01002000, UART0_BASE = IO_PHYS + 0x01002000,

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@ -0,0 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef SOC_MEDIATEK_MT8186_ADSP_H
#define SOC_MEDIATEK_MT8186_ADSP_H
#include <soc/addressmap.h>
struct mt8186_audiodsp_regs {
u32 reserved1[1024];
u32 audiodsp_adsp_ck_en;
};
check_member(mt8186_audiodsp_regs, audiodsp_adsp_ck_en, 0x1000);
static struct mt8186_audiodsp_regs *const mt8186_audiodsp = (void *)AUDIODSP_BASE;
void mtk_adsp_init(void);
#endif

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@ -2,10 +2,12 @@
#include <bootmem.h> #include <bootmem.h>
#include <device/device.h> #include <device/device.h>
#include <soc/adsp.h>
#include <soc/devapc.h> #include <soc/devapc.h>
#include <soc/dfd.h> #include <soc/dfd.h>
#include <soc/emi.h> #include <soc/emi.h>
#include <soc/mmu_operations.h> #include <soc/mmu_operations.h>
#include <soc/mtcmos.h>
#include <soc/sspm.h> #include <soc/sspm.h>
#include <symbols.h> #include <symbols.h>
@ -24,6 +26,12 @@ static void soc_init(struct device *dev)
{ {
mtk_mmu_disable_l2c_sram(); mtk_mmu_disable_l2c_sram();
sspm_init(); sspm_init();
/* ADSP is required for all MT8186 projects, so it's initialized in soc.c */
mtcmos_adsp_power_on();
mtcmos_protect_adsp_bus();
mtk_adsp_init();
dapc_init(); dapc_init();
if (CONFIG(MTK_DFD)) if (CONFIG(MTK_DFD))