cache: Add arch_program_segment_loaded call to arm and arm64

arch_program_segment_loaded ensures that the program segment loaded is
synced back from the cache to PoC. dcache_flush_all on arm64 does not
guarantee PoC in case of MP systems. Thus, it is important to track
and sync back all the required segments using
arch_program_segment_loaded. Use this function in rmodules as well
instead of cache_sync_instructions which guarantees sync upto PoC.

BUG=chrome-os-partner:37546
BRANCH=None
TEST=Boots into depthcharge on foster

Change-Id: I64c2dd5e40ea59fa31f300174ca0d0aebcf8041d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 35ba0b882b86ff2c29ac766e1d65f403c8346247
Original-Change-Id: I964aa09f0cafdaab170606cd4b8f2e027698aee7
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/260908
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10173
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Furquan Shaikh 2015-03-18 11:27:25 -07:00 committed by Patrick Georgi
parent 9bb90cd1a2
commit a9ee61e253
2 changed files with 22 additions and 0 deletions

View File

@ -34,6 +34,7 @@
#include <stdint.h>
#include <arch/cache.h>
#include <program_loading.h>
void tlb_invalidate_all(void)
{
@ -155,3 +156,12 @@ void cache_sync_instructions(void)
dsb();
isb();
}
/*
* For each segment of a program loaded this function is called
* to invalidate caches for the addresses of the loaded segment
*/
void arch_segment_loaded(uintptr_t start, size_t size, int flags)
{
cache_sync_instructions();
}

View File

@ -36,6 +36,7 @@
#include <arch/cache.h>
#include <arch/cache_helpers.h>
#include <arch/lib_helpers.h>
#include <program_loading.h>
void tlb_invalidate_all(void)
{
@ -147,3 +148,14 @@ void cache_sync_instructions(void)
flush_dcache_all(DCCISW); /* includes trailing DSB (in assembly) */
icache_invalidate_all(); /* includdes leading DSB and trailing ISB. */
}
/*
* For each segment of a program loaded this function is called
* to invalidate caches for the addresses of the loaded segment
*/
void arch_segment_loaded(uintptr_t start, size_t size, int flags)
{
dcache_clean_invalidate_by_mva((void *)start, size);
icache_invalidate_all();
}