mb/purism/librem_mini: Update GPIO config
Update GPIO config using a fresh dump of inteltool from the vendor (AMI) firmware on a Librem Mini v2, run through intelp2m with parameters '-p cnl -n -ii' Change-Id: I747415fb9ab7b21943d256d248729cb9e2b4b945 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47206 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier
Michael Niewöhner
parent
7bb756fad7
commit
aa11f9a826
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@ -38,8 +38,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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/* GPP_A7 - GPIO */
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/* DW0: 0x44000200, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_A7, 0, DEEP),
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/* DW0: 0x44000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_A7, 1, DEEP),
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/* GPP_A8 - CLKRUN# */
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/* DW0: 0x44000700, DW1: 0x00000000 */
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@ -54,7 +54,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
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/* GPP_A11 - GPIO */
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/* DW0: 0x80880201, DW1: 0x00000000 */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_A11, 1, PLTRST),
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/* GPP_A12 - GPIO */
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@ -74,8 +74,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_A15, 1, PLTRST),
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/* GPP_A16 - GPIO */
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/* DW0: 0x84000200, DW1: 0x00003000 */
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PAD_CFG_TERM_GPO(GPP_A16, 0, UP_20K, PLTRST),
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/* DW0: 0x84000201, DW1: 0x00003000 */
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PAD_CFG_TERM_GPO(GPP_A16, 1, UP_20K, PLTRST),
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/* GPP_A17 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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@ -115,9 +115,9 @@ static const struct pad_config gpio_table[] = {
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/* DW0: 0x44000700, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
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/* GPP_B2 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_B2, 1, PLTRST),
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/* GPP_B2 - VRALERT# */
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/* DW0: 0x84000603, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1),
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/* GPP_B3 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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@ -167,17 +167,17 @@ static const struct pad_config gpio_table[] = {
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_B14, 1, PLTRST),
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/* GPP_B15 - GSPI0_CS0# */
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/* DW0: 0x00000701, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_B15, NONE, PWROK, NF1),
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/* GPP_B15 - GPIO */
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/* DW0: 0x80000201, DW1: 0x00003000 */
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PAD_CFG_TERM_GPO(GPP_B15, 1, UP_20K, PLTRST),
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/* GPP_B16 - GSPI0_CLK */
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/* DW0: 0x84000601, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_B16, NONE, PLTRST, NF1),
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/* GPP_B17 - GSPI0_MISO */
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/* DW0: 0x44000502, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1),
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/* DW0: 0x84000502, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_B17, NONE, PLTRST, NF1),
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/* GPP_B18 - GSPI0_MOSI */
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/* DW0: 0x84000601, DW1: 0x00000000 */
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@ -274,8 +274,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_D7, 1, PLTRST),
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/* GPP_D8 - GPIO */
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/* DW0: 0x84000200, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_D8, 0, PLTRST),
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_D8, 1, PLTRST),
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/* GPP_D9 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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@ -294,16 +294,16 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI_APIC(GPP_D12, UP_20K, DEEP, EDGE_SINGLE, NONE),
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/* GPP_D13 - GPIO */
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/* DW0: 0x04000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_D13, 1, RSMRST),
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/* DW0: 0x44000300, DW1: 0x00000000 */
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PAD_NC(GPP_D13, NONE),
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/* GPP_D14 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_D14, 1, PLTRST),
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/* GPP_D15 - GPIO */
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/* DW0: 0x44000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_D15, 1, DEEP),
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_D15, 1, PLTRST),
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/* GPP_D16 - GPIO */
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/* DW0: 0x04000200, DW1: 0x00000000 */
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@ -352,8 +352,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_TERM_GPO(GPP_F2, 1, UP_20K, PLTRST),
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/* GPP_F3 - GPIO */
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/* DW0: 0x84000200, DW1: 0x00003000 */
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PAD_CFG_TERM_GPO(GPP_F3, 0, UP_20K, PLTRST),
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/* DW0: 0x84000300, DW1: 0x00003000 */
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PAD_NC(GPP_F3, UP_20K),
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/* GPP_F4 - CNV_BRI_DT */
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/* DW0: 0x44000700, DW1: 0x00003000 */
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@ -494,20 +494,20 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_H13, 1, PLTRST),
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/* GPP_H14 - GPIO */
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/* DW0: 0x84000200, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_H14, 0, PLTRST),
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_H14, 1, PLTRST),
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/* GPP_H15 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_H15, 1, PLTRST),
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/* GPP_H16 - GPIO */
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/* DW0: 0x04000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_H16, 1, RSMRST),
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/* DW0: 0x44000300, DW1: 0x00000000 */
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PAD_NC(GPP_H16, NONE),
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/* GPP_H17 - GPIO */
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/* DW0: 0x04000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_H17, 1, RSMRST),
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/* DW0: 0x44000200, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_H17, 0, DEEP),
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/* GPP_H18 - CPU_C10_GATE# */
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/* DW0: 0x44000700, DW1: 0x00000000 */
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@ -518,7 +518,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_H19, 1, PLTRST),
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/* GPP_H20 - GPIO */
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/* DW0: 0x44000300, DW1: 0x00000000 */
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/* DW0: 0x84000300, DW1: 0x00000000 */
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PAD_NC(GPP_H20, NONE),
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/* GPP_H21 - GPIO */
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@ -538,52 +538,52 @@ static const struct pad_config gpio_table[] = {
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/* ------- GPIO Group GPD ------- */
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/* GPD0 - BATLOW# */
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/* DW0: 0x04000702, DW1: 0x00000000 */
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PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),
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/* DW0: 0x44000702, DW1: 0x00000000 */
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PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
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/* GPD1 - ACPRESENT */
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/* DW0: 0x04000702, DW1: 0x00003c00 */
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PAD_CFG_NF(GPD1, NATIVE, RSMRST, NF1),
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/* DW0: 0x44000702, DW1: 0x00003c00 */
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PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
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/* GPD2 - LAN_WAKE# */
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/* DW0: 0x04000702, DW1: 0x00003c00 */
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PAD_CFG_NF(GPD2, NATIVE, RSMRST, NF1),
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/* DW0: 0x44000702, DW1: 0x00003c00 */
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PAD_CFG_NF(GPD2, NATIVE, DEEP, NF1),
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/* GPD3 - PRWBTN# */
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/* DW0: 0x04000702, DW1: 0x00003000 */
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PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),
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/* DW0: 0x44000702, DW1: 0x00003000 */
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PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
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/* GPD4 - SLP_S3# */
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/* DW0: 0x04000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),
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/* DW0: 0x44000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
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/* GPD5 - SLP_S4# */
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/* DW0: 0x04000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),
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/* DW0: 0x44000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
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/* GPD6 - SLP_A# */
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/* DW0: 0x04000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),
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/* DW0: 0x44000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
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/* GPD7 - GPIO */
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/* DW0: 0x04000200, DW1: 0x00000000 */
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PAD_CFG_GPO(GPD7, 0, RSMRST),
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/* DW0: 0x44000200, DW1: 0x00000000 */
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PAD_CFG_GPO(GPD7, 0, DEEP),
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/* GPD8 - SUSCLK */
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/* DW0: 0x04000700, DW1: 0x00000000 */
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PAD_CFG_NF(GPD8, NONE, RSMRST, NF1),
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/* DW0: 0x44000700, DW1: 0x00000000 */
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PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
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/* GPD9 - SLP_WLAN# */
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/* DW0: 0x04000700, DW1: 0x00000000 */
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PAD_CFG_NF(GPD9, NONE, RSMRST, NF1),
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/* DW0: 0x44000700, DW1: 0x00000000 */
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PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
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/* GPD10 - SLP_S5# */
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/* DW0: 0x04000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),
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/* DW0: 0x44000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
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/* GPD11 - LANPHYPC */
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/* DW0: 0x04000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD11, NONE, RSMRST, NF1),
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/* DW0: 0x44000600, DW1: 0x00000000 */
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PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
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/* ------- GPIO Community 4 ------- */
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@ -634,8 +634,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_C10, 0, PLTRST),
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/* GPP_C11 - GPIO */
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/* DW0: 0x84000201, DW1: 0x00000000 */
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PAD_CFG_GPO(GPP_C11, 1, PLTRST),
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/* DW0: 0x40100103, DW1: 0x00000000 */
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PAD_CFG_GPI_APIC(GPP_C11, NONE, DEEP, LEVEL, NONE),
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/* GPP_C12 - UART1_RXD */
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/* DW0: 0x84000603, DW1: 0x00000000 */
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@ -650,8 +650,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1),
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/* GPP_C15 - UART1_CTS# */
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/* DW0: 0x44000702, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_C15, NONE, DEEP, NF1),
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/* DW0: 0x84000603, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_C15, NONE, PLTRST, NF1),
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/* GPP_C16 - I2C0_SDA */
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/* DW0: 0x84000402, DW1: 0x00000000 */
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@ -776,12 +776,12 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
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/* GPP_E22 - DPPD_CTRLCLK */
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/* DW0: 0x44000702, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_E22, NONE, DEEP, NF1),
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/* DW0: 0x84000603, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_E22, NONE, PLTRST, NF1),
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/* GPP_E23 - DPPD_CTRLDATA */
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/* DW0: 0x44000602, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_E23, NONE, DEEP, NF1),
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/* DW0: 0x84000603, DW1: 0x00000000 */
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PAD_CFG_NF(GPP_E23, NONE, PLTRST, NF1),
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};
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const struct pad_config *variant_gpio_table(size_t *num)
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