soc/amd/stoneyridge/lpc.c: Refactor lpc_enable_childrens_resources
Factor out the code into separate functions. Create set_lpc_resource that will set the resource for a particular child while lpc_enable_childrens_resources finds all children and calls set_lpc_resource for each child found. This creates well defined boundaries for each function. Change-Id: I265cfac2049733481faf8a6e5b02e34aadae11f5 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/21904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
This commit is contained in:
Richard Spiegel
Martin Roth
parent
1a81a4d135
commit
aa1838577d
|
|
@ -152,69 +152,28 @@ static void lpc_set_resources(struct device *dev)
|
|||
pci_dev_set_resources(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable resources for children devices
|
||||
*
|
||||
* @param dev the device whose children's resources are to be enabled
|
||||
*
|
||||
*/
|
||||
static void lpc_enable_childrens_resources(device_t dev)
|
||||
static void set_lpc_resource(device_t child,
|
||||
int *variable_num,
|
||||
u16 *reg_var,
|
||||
u32 *reg,
|
||||
u32 *reg_x,
|
||||
u16 reg_size,
|
||||
u8 *wiosize)
|
||||
{
|
||||
struct bus *link;
|
||||
u32 reg, reg_x;
|
||||
int var_num = 0;
|
||||
u16 reg_var[3];
|
||||
u16 reg_size[1] = {512};
|
||||
u8 wiosize = pci_read_config8(dev, 0x74);
|
||||
|
||||
/* Be a bit relaxed, tolerate that LPC region might be bigger than
|
||||
* resource we try to fit, do it like this for all regions < 16 bytes.
|
||||
* If there is a resource > 16 bytes it must be 512 bytes to be able
|
||||
* to allocate the fresh LPC window.
|
||||
*
|
||||
* AGESA likes to enable already one LPC region in wide port base
|
||||
* 0x64-0x65, using DFLT_SIO_PME_BASE_ADDRESS, 512 bytes size
|
||||
* The code tries to check if resource can fit into this region.
|
||||
*/
|
||||
|
||||
reg = pci_read_config32(dev, 0x44);
|
||||
reg_x = pci_read_config32(dev, 0x48);
|
||||
|
||||
/* check if ranges are free and don't use them if already taken */
|
||||
if (reg_x & (1 << 2))
|
||||
var_num = 1;
|
||||
/* just in case check if someone did not manually set other ranges */
|
||||
if (reg_x & (1 << 24))
|
||||
var_num = 2;
|
||||
|
||||
if (reg_x & (1 << 25))
|
||||
var_num = 3;
|
||||
|
||||
/* check AGESA region size */
|
||||
if (wiosize & (1 << 0))
|
||||
reg_size[0] = 16;
|
||||
|
||||
reg_var[2] = pci_read_config16(dev, 0x90);
|
||||
reg_var[1] = pci_read_config16(dev, 0x66);
|
||||
reg_var[0] = pci_read_config16(dev, 0x64);
|
||||
|
||||
/* todo: clean up the code style here */
|
||||
for (link = dev->link_list ; link ; link = link->next) {
|
||||
device_t child;
|
||||
for (child = link->children; child;
|
||||
child = child->sibling) {
|
||||
if (child->enabled
|
||||
&& (child->path.type == DEVICE_PATH_PNP)) {
|
||||
struct resource *res;
|
||||
for (res = child->resource_list ; res ; res = res->next) {
|
||||
u32 base, end; /* don't need long long */
|
||||
u32 rsize, set = 0, set_x = 0;
|
||||
u32 base, end;
|
||||
u32 rsize = 0, set = 0, set_x = 0;
|
||||
u16 var_num;
|
||||
|
||||
var_num = *variable_num;
|
||||
for (res = child->resource_list; res; res = res->next) {
|
||||
if (!(res->flags & IORESOURCE_IO))
|
||||
continue;
|
||||
base = res->base;
|
||||
end = resource_end(res);
|
||||
/* find a resource size */
|
||||
printk(BIOS_DEBUG, "Southbridge LPC decode:%s, base=0x%08x, end=0x%08x\n",
|
||||
printk(BIOS_DEBUG,
|
||||
"Southbridge LPC decode:%s, base=0x%08x, end=0x%08x\n",
|
||||
dev_path(child), base, end);
|
||||
switch (base) {
|
||||
case 0x60: /* KB */
|
||||
|
|
@ -283,41 +242,105 @@ static void lpc_enable_childrens_resources(device_t dev)
|
|||
rsize = 0;
|
||||
/* try AGESA allocated region in region 0 */
|
||||
if ((var_num > 0) && ((base >= reg_var[0]) &&
|
||||
((base + res->size) <= (reg_var[0] + reg_size[0]))))
|
||||
rsize = reg_size[0];
|
||||
((base + res->size) <= (reg_var[0] + reg_size))))
|
||||
rsize = reg_size;
|
||||
}
|
||||
/* check if region found and matches the enable */
|
||||
if (res->size <= rsize) {
|
||||
reg |= set;
|
||||
reg_x |= set_x;
|
||||
*reg |= set;
|
||||
*reg_x |= set_x;
|
||||
/* check if we can fit resource in variable range */
|
||||
} else if ((var_num < 3) &&
|
||||
((res->size <= 16) || (res->size == 512))) {
|
||||
} else if ((var_num < 3) && ((res->size <= 16) ||
|
||||
(res->size == 512))) {
|
||||
/* use variable ranges if pre-defined do not match */
|
||||
switch (var_num) {
|
||||
case 0:
|
||||
reg_x |= (1 << 2);
|
||||
*reg_x |= (1 << 2);
|
||||
if (res->size <= 16)
|
||||
wiosize |= (1 << 0);
|
||||
*wiosize |= (1 << 0);
|
||||
break;
|
||||
case 1:
|
||||
reg_x |= (1 << 24);
|
||||
*reg_x |= (1 << 24);
|
||||
if (res->size <= 16)
|
||||
wiosize |= (1 << 2);
|
||||
*wiosize |= (1 << 2);
|
||||
break;
|
||||
case 2:
|
||||
reg_x |= (1 << 25);
|
||||
*reg_x |= (1 << 25);
|
||||
if (res->size <= 16)
|
||||
wiosize |= (1 << 3);
|
||||
*wiosize |= (1 << 3);
|
||||
break;
|
||||
}
|
||||
reg_var[var_num++] =
|
||||
base & 0xffff;
|
||||
} else {
|
||||
printk(BIOS_ERR, "cannot fit LPC decode region:%s, base=0x%08x, end=0x%08x\n",
|
||||
printk(BIOS_ERR, "cannot fit LPC decode region:");
|
||||
printk(BIOS_ERR, "%s, base = 0x%08x, end = 0x%08x\n",
|
||||
dev_path(child), base, end);
|
||||
}
|
||||
}
|
||||
*variable_num = var_num;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable resources for children devices
|
||||
*
|
||||
* @param dev the device whose children's resources are to be enabled
|
||||
*
|
||||
*/
|
||||
static void lpc_enable_childrens_resources(device_t dev)
|
||||
{
|
||||
struct bus *link;
|
||||
u32 reg, reg_x;
|
||||
int var_num = 0;
|
||||
u16 reg_var[3];
|
||||
u16 reg_size[1] = {512};
|
||||
u8 wiosize = pci_read_config8(dev, 0x74);
|
||||
|
||||
/* Be a bit relaxed, tolerate that LPC region might be bigger than
|
||||
* resource we try to fit, do it like this for all regions < 16 bytes.
|
||||
* If there is a resource > 16 bytes it must be 512 bytes to be able
|
||||
* to allocate the fresh LPC window.
|
||||
*
|
||||
* AGESA likes to enable already one LPC region in wide port base
|
||||
* 0x64-0x65, using DFLT_SIO_PME_BASE_ADDRESS, 512 bytes size
|
||||
* The code tries to check if resource can fit into this region.
|
||||
*/
|
||||
|
||||
reg = pci_read_config32(dev, 0x44);
|
||||
reg_x = pci_read_config32(dev, 0x48);
|
||||
|
||||
/* check if ranges are free and don't use them if already taken */
|
||||
if (reg_x & (1 << 2))
|
||||
var_num = 1;
|
||||
/* just in case check if someone did not manually set other ranges */
|
||||
if (reg_x & (1 << 24))
|
||||
var_num = 2;
|
||||
|
||||
if (reg_x & (1 << 25))
|
||||
var_num = 3;
|
||||
|
||||
/* check AGESA region size */
|
||||
if (wiosize & (1 << 0))
|
||||
reg_size[0] = 16;
|
||||
|
||||
reg_var[2] = pci_read_config16(dev, 0x90);
|
||||
reg_var[1] = pci_read_config16(dev, 0x66);
|
||||
reg_var[0] = pci_read_config16(dev, 0x64);
|
||||
|
||||
/* todo: clean up the code style here */
|
||||
for (link = dev->link_list; link; link = link->next) {
|
||||
device_t child;
|
||||
for (child = link->children; child;
|
||||
child = child->sibling) {
|
||||
if (child->enabled
|
||||
&& (child->path.type == DEVICE_PATH_PNP)) {
|
||||
set_lpc_resource(child,
|
||||
&var_num,
|
||||
reg_var,
|
||||
®,
|
||||
®_x,
|
||||
reg_size[0],
|
||||
&wiosize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue