skylake: ACPI: Fix compiler warnings with iasl-20150717

Updating to a new IASL introduces a lot of warnings that are not serious issues but can be fixed with some reworks. - Method local variables that are set but never used now warn, when needing to read back a register the ordering is now changed to set the value in Local0 first so the compiler does not complain. - Methods that create an object must be serialized - A ResourceTemplate declared inside a _CRS with a named variable does not seem to be able to compile without a warning. To fix this move the ResourceTemplate outside the _CRS method. - The DPTF CPU code was still using the old legacy \_PR.CPUx instead of the new \_PR.CPxx definitions. BUG=chrome-os-partner:44622 BRANCH=none TEST=build glados with iasl-20150717 and see no warnings Original-Change-Id: I4a66c7eb6495aac4ae1aa42100c846725c1a04d2 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/302168 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ia3af802ca2faab4f1c59e73f2ce31a65c7e862e0 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11812 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@google.com>
2015-09-23 18:01:45 -07:00 · 2015-09-23 18:01:45 -07:00 · aa1b6b06ef
commit aa1b6b06ef
parent 909c512c88
6 changed files with 171 additions and 162 deletions
--- a/src/soc/intel/skylake/acpi/dptf/cpu.asl
+++ b/src/soc/intel/skylake/acpi/dptf/cpu.asl
@ -46,10 +46,11 @@
 #define DPTF_CPU_ACTIVE_AC4     50
 #endif

-External (\_PR.CPU0._TSS, MethodObj)
-External (\_PR.CPU0._TPC, MethodObj)
-External (\_PR.CPU0._PTC, PkgObj)
-External (\_PR.CPU0._TSD, PkgObj)
+External (\_PR.CP00._PSS, PkgObj)
+External (\_PR.CP00._TSS, PkgObj)
+External (\_PR.CP00._TPC, MethodObj)
+External (\_PR.CP00._PTC, PkgObj)
+External (\_PR.CP00._TSD, PkgObj)
 External (\_SB.MPDL, IntObj)

 Device (B0D4)
@ -71,8 +72,8 @@ Device (B0D4)

 	Method (_TSS)
 	{
-		If (CondRefOf (\_PR.CPU0._TSS)) {
-			Return (\_PR.CPU0._TSS)
+		If (CondRefOf (\_PR.CP00._TSS)) {
+			Return (\_PR.CP00._TSS)
 		} Else {
 			Return (Package ()
 			{
@ -83,8 +84,8 @@ Device (B0D4)

 	Method (_TPC)
 	{
-		If (CondRefOf (\_PR.CPU0._TPC)) {
-			Return (\_PR.CPU0._TPC)
+		If (CondRefOf (\_PR.CP00._TPC)) {
+			Return (\_PR.CP00._TPC)
 		} Else {
 			Return (0)
 		}
@ -92,8 +93,8 @@ Device (B0D4)

 	Method (_PTC)
 	{
-		If (CondRefOf (\_PR.CPU0._PTC)) {
-			Return (\_PR.CPU0._PTC)
+		If (CondRefOf (\_PR.CP00._PTC)) {
+			Return (\_PR.CP00._PTC)
 		} Else {
 			Return (Package ()
 			{
@ -105,8 +106,8 @@ Device (B0D4)

 	Method (_TSD)
 	{
-		If (CondRefOf (\_PR.CPU0._TSD)) {
-			Return (\_PR.CPU0._TSD)
+		If (CondRefOf (\_PR.CP00._TSD)) {
+			Return (\_PR.CP00._TSD)
 		} Else {
 			Return (Package ()
 			{
@ -117,8 +118,8 @@ Device (B0D4)

 	Method (_TDL)
 	{
-		If (CondRefOf (\_PR.CPU0._TSS)) {
-			Store (SizeOf (\_PR.CPU0._TSS ()), Local0)
+		If (CondRefOf (\_PR.CP00._TSS)) {
+			Store (SizeOf (\_PR.CP00._TSS), Local0)
 			Decrement (Local0)
 			Return (Local0)
 		} Else {
--- a/src/soc/intel/skylake/acpi/globalnvs.asl
+++ b/src/soc/intel/skylake/acpi/globalnvs.asl
@ -30,7 +30,8 @@ Name (\PICM, 0)		// IOAPIC/8259
 * we have to fix it up in coreboot's ACPI creation phase.
 */

-External(NVSA)
+External (NVSA)
+
 OperationRegion (GNVS, SystemMemory, NVSA, 0x2000)
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
--- a/src/soc/intel/skylake/acpi/pcr.asl
+++ b/src/soc/intel/skylake/acpi/pcr.asl
@ -32,7 +32,7 @@ Method (PCRB, 1, NotSerialized)
 * Arg0 - PCR Port ID
 * Arg1 - Register Offset
 */
-Method (PCRR, 2, NotSerialized)
+Method (PCRR, 2, Serialized)
 {
 	OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
 	Field (PCRD, DWordAcc, NoLock, Preserve)
--- a/src/soc/intel/skylake/acpi/scs.asl
+++ b/src/soc/intel/skylake/acpi/scs.asl
@ -37,7 +37,7 @@ Device (EMMC)

 	Method (_PS0, 0, Serialized)
 	{
-		/* Disable Power Good */
+		/* Disable Power Gate */
 		Store (0, ^PGEN)

 		/* Clear bits 31, 6, 2, 0 */
@ -48,17 +48,19 @@ Device (EMMC)
 		^^PCRO (PID_SCS, 0x600, 0x80000045)

 		/* Set Power State to D0 */
-		Store (0, ^D0D3)
+		Store (Zero, Local0)
+		Store (Local0, ^D0D3)
 		Store (^D0D3, Local0)
 	}

 	Method (_PS3, 0, Serialized)
 	{
-		/* Enable Power Good */
+		/* Enable Power Gate */
 		Store (1, ^PGEN)

 		/* Set Power State to D0 */
-		Store (3, ^D0D3)
+		Store (3, Local0)
+		Store (Local0, ^D0D3)
 		Store (^D0D3, Local0)
 	}

@ -89,7 +91,7 @@ Device (SDXC)

 	Method (_PS0, 0, Serialized)
 	{
-		/* Disable Power Good */
+		/* Disable Power Gate */
 		Store (0, ^PGEN)

 		/* Clear bits 8, 7, 2, 0 */
@ -100,17 +102,19 @@ Device (SDXC)
 		^^PCRO (PID_SCS, 0x600, 0x00000185)

 		/* Set Power State to D0 */
-		Store (0, ^D0D3)
+		Store (Zero, Local0)
+		Store (Local0, ^D0D3)
 		Store (^D0D3, Local0)
 	}

 	Method (_PS3, 0, Serialized)
 	{
-		/* Enable Power Good */
+		/* Enable Power Gate */
 		Store (1, ^PGEN)

 		/* Set Power State to D0 */
-		Store (3, ^D0D3)
+		Store (3, Local0)
+		Store (Local0, ^D0D3)
 		Store (^D0D3, Local0)
 	}

--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@ -72,140 +72,140 @@ Device (MCHC)
 	}
 }

+Name (MCRS, ResourceTemplate ()
+{
+	/* Bus Numbers */
+	WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+			0x0000, 0x0000, 0x00ff, 0x0000, 0x0100)
+
+	/* IO Region 0 */
+	DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+			EntireRange,
+			0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8)
+
+	/* PCI Config Space */
+	Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
+
+	/* IO Region 1 */
+	DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+			EntireRange,
+			0x0000, 0x0d00, 0xffff, 0x0000, 0xf300)
+
+	/* VGA memory (0xa0000-0xbffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
+			0x00020000)
+
+	/*  OPROM reserved (0xc0000-0xc3fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xc4000-0xc7fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xc8000-0xcbfff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xcc000-0xcffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xd0000-0xd3fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xd4000-0xd7fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xd8000-0xdbfff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
+			0x00004000)
+
+	/* OPROM reserved (0xdc000-0xdffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
+			0x00004000)
+
+	/* BIOS Extension (0xe0000-0xe3fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
+			0x00004000)
+
+	/* BIOS Extension (0xe4000-0xe7fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
+			0x00004000)
+
+	/* BIOS Extension (0xe8000-0xebfff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
+			0x00004000)
+
+	/* BIOS Extension (0xec000-0xeffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000ec000, 0x000effff, 0x00000000,
+			0x00004000)
+
+	/* System BIOS (0xf0000-0xfffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
+			0x00010000)
+
+	/* PCI Memory Region (TOLUD - 0xdfffffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			NonCacheable, ReadWrite,
+			0x00000000, 0x00000000, 0xdfffffff, 0x00000000,
+			0xE0000000,,, PM01)
+
+	/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
+	QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			NonCacheable, ReadWrite,
+			0x00000000, 0x10000, 0x1ffff, 0x00000000,
+			0x10000,,, PM02)
+
+	/* PCH reserved resource (0xfd000000-0xfe7fffff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0xfd000000, 0xfe7fffff, 0x00000000,
+			0x1800000)
+
+	/* TPM Area (0xfed40000-0xfed44fff) */
+	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+			Cacheable, ReadWrite,
+			0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
+			0x00005000)
+})
+
 Method (_CRS, 0, Serialized)
 {
-	Name (MCRS, ResourceTemplate ()
-	{
-		/* Bus Numbers */
-		WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-				0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,, PB00)
-
-		/* IO Region 0 */
-		DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-				EntireRange,
-				0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00)
-
-		/* PCI Config Space */
-		Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
-
-		/* IO Region 1 */
-		DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-				EntireRange,
-				0x0000, 0x0d00, 0xffff, 0x0000, 0xf300,,, PI01)
-
-		/* VGA memory (0xa0000-0xbffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
-				0x00020000,,, ASEG)
-
-		/*  OPROM reserved (0xc0000-0xc3fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
-				0x00004000,,, OPR0)
-
-		/* OPROM reserved (0xc4000-0xc7fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
-				0x00004000,,, OPR1)
-
-		/* OPROM reserved (0xc8000-0xcbfff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
-				0x00004000,,, OPR2)
-
-		/* OPROM reserved (0xcc000-0xcffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
-				0x00004000,,, OPR3)
-
-		/* OPROM reserved (0xd0000-0xd3fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
-				0x00004000,,, OPR4)
-
-		/* OPROM reserved (0xd4000-0xd7fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
-				0x00004000,,, OPR5)
-
-		/* OPROM reserved (0xd8000-0xdbfff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
-				0x00004000,,, OPR6)
-
-		/* OPROM reserved (0xdc000-0xdffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
-				0x00004000,,, OPR7)
-
-		/* BIOS Extension (0xe0000-0xe3fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
-				0x00004000,,, ESG0)
-
-		/* BIOS Extension (0xe4000-0xe7fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
-				0x00004000,,, ESG1)
-
-		/* BIOS Extension (0xe8000-0xebfff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
-				0x00004000,,, ESG2)
-
-		/* BIOS Extension (0xec000-0xeffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000ec000, 0x000effff, 0x00000000,
-				0x00004000,,, ESG3)
-
-		/* System BIOS (0xf0000-0xfffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
-				0x00010000,,, FSEG)
-
-		/* PCI Memory Region (TOLUD - 0xdfffffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				NonCacheable, ReadWrite,
-				0x00000000, 0x00000000, 0xdfffffff, 0x00000000,
-				0xE0000000,,, PM01)
-
-		/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
-		QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				NonCacheable, ReadWrite,
-				0x00000000, 0x10000, 0x1ffff, 0x00000000,
-				0x10000,,, PM02)
-
-		/* PCH reserved resource (0xfd000000-0xfe7fffff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0xfd000000, 0xfe7fffff, 0x00000000,
-				0x1800000,,, PM03)
-
-		/* TPM Area (0xfed40000-0xfed44fff) */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
-				0x00005000,,, TPMR)
-	})
-
 	/* Find PCI resource area in MCRS */
-	CreateDwordField (MCRS, PM01._MIN, PMIN)
-	CreateDwordField (MCRS, PM01._MAX, PMAX)
-	CreateDwordField (MCRS, PM01._LEN, PLEN)
+	CreateDwordField (^MCRS, ^PM01._MIN, PMIN)
+	CreateDwordField (^MCRS, ^PM01._MAX, PMAX)
+	CreateDwordField (^MCRS, ^PM01._LEN, PLEN)

 	/*
 	 * Fix up PCI memory region
@ -224,9 +224,9 @@ Method (_CRS, 0, Serialized)
 	Add (Subtract (PMAX, PMIN), 1, PLEN)

 	/* Patch PM02 range based on Memory Size */
-	CreateQwordField (MCRS, PM02._MIN, MMIN)
-	CreateQwordField (MCRS, PM02._MAX, MMAX)
-	CreateQwordField (MCRS, PM02._LEN, MLEN)
+	CreateQwordField (^MCRS, ^PM02._MIN, MMIN)
+	CreateQwordField (^MCRS, ^PM02._MAX, MMAX)
+	CreateQwordField (^MCRS, ^PM02._LEN, MLEN)

 	Store (^MCHC.TUUD, Local0)

@ -239,7 +239,7 @@ Method (_CRS, 0, Serialized)
 	}
 	Subtract (Add (MMIN, MLEN), 1, MMAX)

-	Return (MCRS)
+	Return (^MCRS)
 }

 Name (EP_B, 0) /* to store EP BAR */
--- a/src/soc/intel/skylake/acpi/xhci.asl
+++ b/src/soc/intel/skylake/acpi/xhci.asl
@ -79,7 +79,8 @@ Device (XHCI)

 		/* If device is in D3, set back to D0 */
 		If (LEqual (^D0D3, 3)) {
-			Store (Zero, ^D0D3)
+			Store (Zero, Local0)
+			Store (Local0, ^D0D3)
 			Store (^D0D3, Local0)
 		}

@ -122,7 +123,8 @@ Device (XHCI)

 		/* If device is in D3, set back to D0 */
 		If (LEqual (^D0D3, 3)) {
-			Store (Zero, ^D0D3)
+			Store (Zero, Local0)
+			Store (Local0, ^D0D3)
 			Store (^D0D3, Local0)
 		}

@ -130,7 +132,8 @@ Device (XHCI)
 		Store (3, ^UPSW)

 		/* Now put device in D3 */
-		Store (3, ^D0D3)
+		Store (3, Local0)
+		Store (Local0, ^D0D3)
 		Store (^D0D3, Local0)

 		/*