From aa5eae629f40f4337f68b516f67c5c783ab65495 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Mon, 24 Sep 2012 10:58:41 +0200 Subject: [PATCH] inteltool: Add output of 64bit registers in PMBASE Output values of 64bit registers and fix settings for GPE0_EN for ICH9/10. Change-Id: I8ca6b32500331707670972b38466345f581844cd Signed-off-by: Nico Huber Reviewed-on: http://review.coreboot.org/1625 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Peter Stuge --- util/inteltool/powermgt.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 4974738b28..71dfc49af2 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -41,7 +41,7 @@ static const io_register_t ich10_pm_registers[] = { { 0x1a, 2, "RESERVED" }, { 0x1c, 4, "RESERVED" }, { 0x20, 8, "GPE0_STS" }, // General Purpose Event 0 Status; ACPI pointer: GPE0_BLK - { 0x2C, 4, "GPE0_EN" }, // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8 + { 0x28, 8, "GPE0_EN" }, // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8 { 0x30, 4, "SMI_EN" }, { 0x34, 4, "SMI_STS" }, { 0x38, 2, "ALT_GP_SMI_EN" }, @@ -102,7 +102,7 @@ static const io_register_t ich9_pm_registers[] = { { 0x1a, 2, "RESERVED" }, { 0x1c, 4, "RESERVED" }, { 0x20, 8, "GPE0_STS" }, // General Purpose Event 0 Status; ACPI pointer: GPE0_BLK - { 0x2C, 4, "GPE0_EN" }, // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8 + { 0x28, 8, "GPE0_EN" }, // General Purpose Event 0 Enables; ACPI pointer: GPE0_BLK+8 { 0x30, 4, "SMI_EN" }, { 0x34, 4, "SMI_STS" }, { 0x38, 2, "ALT_GP_SMI_EN" }, @@ -689,6 +689,14 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) for (i = 0; i < size; i++) { switch (pm_registers[i].size) { + case 8: + printf("pmbase+0x%04x: 0x%08x (%s)\n" + " 0x%08x\n", + pm_registers[i].addr, + inl(pmbase+pm_registers[i].addr), + pm_registers[i].name, + inl(pmbase+pm_registers[i].addr+4)); + break; case 4: printf("pmbase+0x%04x: 0x%08x (%s)\n", pm_registers[i].addr,