soc/amd/stoneyridge: Move sata to common
Relocate generic sata support from stoneyridge to common/block. BUG=b:131682806 Change-Id: I4e9eddaa291e5e03f4f8d88826973c5b8ee9a1c5 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32661 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __AMDBLOCKS_SATA_H__
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#define __AMDBLOCKS_SATA_H__
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#include <device/device.h>
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void soc_enable_sata_features(struct device *dev);
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#endif /* __AMDBLOCKS_SATA_H__ */
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@ -0,0 +1,5 @@
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config SOC_AMD_COMMON_BLOCK_SATA
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bool
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default n
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help
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Select this option to use AMD common SATA driver support.
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@ -0,0 +1 @@
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_HDA) += sata.c
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@ -0,0 +1,41 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <amdblocks/sata.h>
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void __weak soc_enable_sata_features(struct device *dev) { }
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static struct device_operations sata_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = soc_enable_sata_features,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_AMD_CZ_SATA,
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PCI_DEVICE_ID_AMD_CZ_SATA_AHCI,
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0
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};
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static const struct pci_driver sata0_driver __pci_driver = {
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.ops = &sata_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.devices = pci_device_ids,
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};
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@ -53,6 +53,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_HDA
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select SOC_AMD_COMMON_BLOCK_SATA
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select SOC_AMD_COMMON_BLOCK_PI
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select SOC_AMD_COMMON_BLOCK_PSP
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select SOC_AMD_COMMON_BLOCK_CAR
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@ -18,9 +18,10 @@
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <device/pci_def.h>
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#include <amdblocks/sata.h>
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#include <soc/southbridge.h>
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static void soc_enable_sata_features(struct device *dev)
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void soc_enable_sata_features(struct device *dev)
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{
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u8 *ahci_ptr;
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u32 misc_ctl, cap_cfg;
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@ -45,32 +46,3 @@ static void soc_enable_sata_features(struct device *dev)
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temp &= ~SATA_MISC_SUBCLASS_WREN;
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pci_write_config32(dev, SATA_MISC_CONTROL_REG, temp);
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};
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static void sata_init(struct device *dev)
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{
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soc_enable_sata_features(dev);
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}
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static struct pci_operations lops_pci = {
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/* .set_subsystem = pci_dev_set_subsystem, */
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};
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static struct device_operations sata_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = sata_init,
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.ops_pci = &lops_pci,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_AMD_CZ_SATA,
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PCI_DEVICE_ID_AMD_CZ_SATA_AHCI,
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0
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};
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static const struct pci_driver sata0_driver __pci_driver = {
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.ops = &sata_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.devices = pci_device_ids,
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};
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