diff --git a/src/include/elog.h b/src/include/elog.h
index 6c2c5317cc..89079dece5 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -79,7 +79,7 @@
 #define  ELOG_WAKE_SOURCE_PME              0x01
 #define  ELOG_WAKE_SOURCE_PME_INTERNAL     0x02
 #define  ELOG_WAKE_SOURCE_RTC              0x03
-#define  ELOG_WAKE_SOURCE_GPIO             0x04
+#define  ELOG_WAKE_SOURCE_GPE              0x04
 #define  ELOG_WAKE_SOURCE_SMBUS            0x05
 #define  ELOG_WAKE_SOURCE_PWRBTN           0x06
 #define  ELOG_WAKE_SOURCE_PME_HDA          0x07
diff --git a/src/soc/amd/common/block/acpi/acpi.c b/src/soc/amd/common/block/acpi/acpi.c
index 2d75ec0e94..4ca6599536 100644
--- a/src/soc/amd/common/block/acpi/acpi.c
+++ b/src/soc/amd/common/block/acpi/acpi.c
@@ -90,7 +90,7 @@ static void log_gpe_events(const struct acpi_pm_gpe_state *state)
 
 	for (i = 0; i <= 31; i++) {
 		if (valid_gpe & (1U << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i);
 	}
 }
 
diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c
index 408017f940..3e82c32e69 100644
--- a/src/soc/intel/apollolake/elog.c
+++ b/src/soc/intel/apollolake/elog.c
@@ -18,7 +18,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c
index 75c080d5b6..7e92e9037d 100644
--- a/src/soc/intel/baytrail/elog.c
+++ b/src/soc/intel/baytrail/elog.c
@@ -68,7 +68,7 @@ static void log_wake_events(const struct chipset_power_state *ps)
 	i = 0;
 	while (gpio_mask) {
 		if (gpio_mask & gpe0_sts)
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i);
 		gpio_mask <<= 1;
 		i++;
 	}
diff --git a/src/soc/intel/braswell/elog.c b/src/soc/intel/braswell/elog.c
index 75c080d5b6..7e92e9037d 100644
--- a/src/soc/intel/braswell/elog.c
+++ b/src/soc/intel/braswell/elog.c
@@ -68,7 +68,7 @@ static void log_wake_events(const struct chipset_power_state *ps)
 	i = 0;
 	while (gpio_mask) {
 		if (gpio_mask & gpe0_sts)
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i);
 		gpio_mask <<= 1;
 		i++;
 	}
diff --git a/src/soc/intel/broadwell/elog.c b/src/soc/intel/broadwell/elog.c
index f918958896..9271e27872 100644
--- a/src/soc/intel/broadwell/elog.c
+++ b/src/soc/intel/broadwell/elog.c
@@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
@@ -48,7 +48,7 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
 
 	/* GPIO27 */
 	if (ps->gpe0_sts[GPE_STD] & GP27_STS)
-		elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, 27);
+		elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, 27);
 
 	/* Log GPIO events in set 1-3 */
 	pch_log_gpio_gpe(ps->gpe0_sts[GPE_31_0], ps->gpe0_en[GPE_31_0], 0);
diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c
index 9fa725e388..3600d76d95 100644
--- a/src/soc/intel/cannonlake/elog.c
+++ b/src/soc/intel/cannonlake/elog.c
@@ -97,7 +97,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
diff --git a/src/soc/intel/icelake/elog.c b/src/soc/intel/icelake/elog.c
index 4727fbf9f6..235dc6e3cf 100644
--- a/src/soc/intel/icelake/elog.c
+++ b/src/soc/intel/icelake/elog.c
@@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c
index 4727fbf9f6..235dc6e3cf 100644
--- a/src/soc/intel/jasperlake/elog.c
+++ b/src/soc/intel/jasperlake/elog.c
@@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c
index 550ee41805..dee93d889b 100644
--- a/src/soc/intel/skylake/elog.c
+++ b/src/soc/intel/skylake/elog.c
@@ -22,7 +22,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
diff --git a/src/soc/intel/tigerlake/elog.c b/src/soc/intel/tigerlake/elog.c
index b38d316def..84f0a7ed4f 100644
--- a/src/soc/intel/tigerlake/elog.c
+++ b/src/soc/intel/tigerlake/elog.c
@@ -16,7 +16,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index c130958191..684f830a9b 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -87,7 +87,7 @@ void pch_log_state(void)
 	/* GPIO 0-15 */
 	for (i = 0; i < 16; i++) {
 		if ((gpe0_sts & (1 << (16+i))) && (gpe0_en & (1 << (16+i))))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i);
 	}
 
 	/* SMBUS Wake */
diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c
index 2e4df72658..8146794aa3 100644
--- a/src/southbridge/intel/lynxpoint/elog.c
+++ b/src/southbridge/intel/lynxpoint/elog.c
@@ -36,7 +36,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts_reg, u32 gpe0_en_reg, int start)
 
 	for (i = 0; i <= 31; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i + start);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i + start);
 	}
 }
 
@@ -64,7 +64,7 @@ static void pch_log_gpe(void)
 	gpe0_sts = inw(pmbase + GPE0_STS + 2) & gpe0_en;
 	for (i = 0; i <= 15; i++) {
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i);
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i);
 	}
 
 	/*
@@ -78,7 +78,7 @@ static void pch_log_gpe(void)
 		if (!gpe0_high_gpios[i])
 			continue;
 		if (gpe0_sts & (1 << i))
-			elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO,
+			elog_add_event_wake(ELOG_WAKE_SOURCE_GPE,
 					    gpe0_high_gpios[i]);
 	}
 }