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cpu/amd/family_10h-family_15h: Set up cache controls on Family 15h to improve performance

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Change-Id: I3df571d8091c07ac1ee29bf16b5a68585fa9eed4
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12039
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Timothy Pearson 2015-08-08 20:31:03 -05:00 committed by Stefan Reinauer
parent 0d2fdeb36a
commit aab3ad256a
1 changed files with 8 additions and 2 deletions
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10
src/cpu/amd/family_10h-family_15h/defaults.h
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@ -135,8 +135,9 @@ static const struct {
0x00000000, 1 << (42-32)}, /* Bx [PwcDisableWalkerSharing]=1 */
{ BU_CFG3, AMD_OR_C0, AMD_PTYPE_ALL,
1 << 22, 0x00000000,
1 << 22, 0x00000000}, /* C0 or above [PfcDoubleStride]=1 */
(0x3 << 20) | (0x1 << 22), 0x00000000,
(0x3 << 20) | (0x1 << 22), 0x00000000}, /* C0 or above [PfcDoubleStride]=1,
PfcStrideMul]=0x3 */
{ EX_CFG, AMD_OR_C0, AMD_PTYPE_ALL,
0x00000000, 1 << (54-32),
@ -629,6 +630,11 @@ static const struct {
* System software should set F5x88[14] to 1b. */
{ 5, 0x88, AMD_OR_B2, AMD_PTYPE_ALL,
1 << 14, 1 << 14 },
/* L3 Control 2 */
{ 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL,
0x00000090, 0x000001d0 }, /* ImplRdProjDelayThresh = 0x2,
ImplRdAnySubUnavail = 0x1 */
};