cpu/intel/common: Use a common acpi/cpu.asl file

Change-Id: Ifa5a3a22771ff2e0efa14fb765603fd5e0440d59
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: David Guckian

src/cpu/intel/haswell/acpi/cpu.asl

@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/cpu/intel/model_206ax/acpi/cpu.asl

@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/mainboard/adi/rcc-dff/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 
 	#include "acpi/thermal.asl"
 
-	#include <cpu/intel/fsp_model_406dx/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/apple/macbookair4_2/dsdt.asl

@@ -26,7 +26,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/asrock/b75pro3-m/dsdt.asl

@@ -29,7 +29,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/asrock/h81m-hds/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 	#include <southbridge/intel/lynxpoint/acpi/platform.asl>
 	#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
 	#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
-	#include <cpu/intel/haswell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB)
 	{

src/mainboard/asus/maximus_iv_gene-z/dsdt.asl

@@ -25,7 +25,7 @@ DefinitionBlock(
 )
 {
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>

src/mainboard/asus/p8h61-m_lx/dsdt.asl

@@ -25,7 +25,7 @@ DefinitionBlock(
 )
 {
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>

src/mainboard/asus/p8h61-m_pro/dsdt.asl

@@ -27,7 +27,7 @@ DefinitionBlock(
 	// Some generic macros
 	#include "acpi/platform.asl"
 	#include "acpi/superio.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 
 	/* global NVS and variables.  */

src/mainboard/compulab/intense_pc/dsdt.asl

@@ -29,7 +29,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/esd/atom15/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
 
-	#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl

@@ -25,7 +25,7 @@ DefinitionBlock(
 
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	/* global NVS and variables. */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>

src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl

@@ -25,7 +25,7 @@ DefinitionBlock(
 
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	/* global NVS and variables. */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>

src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl

@@ -29,7 +29,7 @@ DefinitionBlock(
 	#include "acpi/platform.asl"
 	#include "acpi/superio.asl"
 	#include "acpi/thermal.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 
 	/* global NVS and variables.  */

src/mainboard/google/auron/dsdt.asl

@@ -37,7 +37,7 @@ DefinitionBlock(
 	//#include "acpi/gpe.asl"
 
 	// CPU
-	#include <soc/intel/broadwell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/beltino/dsdt.asl

@@ -34,7 +34,7 @@ DefinitionBlock(
 	#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
 
 	// CPU
-	#include <cpu/intel/haswell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/butterfly/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/cyan/dsdt.asl

@@ -31,7 +31,7 @@ DefinitionBlock(
 	/* global NVS and variables */
 	#include <acpi/globalnvs.asl>
 
-	#include <acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/dragonegg/dsdt.asl

@@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <soc/intel/icelake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/icelake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/eve/dsdt.asl

@@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB)
 	{

src/mainboard/google/fizz/dsdt.asl

@@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB)
 	{

src/mainboard/google/glados/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/jecht/dsdt.asl

@@ -37,7 +37,7 @@ DefinitionBlock(
 	//#include "acpi/gpe.asl"
 
 	// CPU
-	#include <soc/intel/broadwell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/link/dsdt.asl

@@ -40,7 +40,7 @@ DefinitionBlock(
 	//#include "acpi/gpe.asl"
 
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/octopus/dsdt.asl

@@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <soc/intel/apollolake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/apollolake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/parrot/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/poppy/dsdt.asl

@@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB)
 	{

src/mainboard/google/rambi/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/baytrail/acpi/globalnvs.asl>
 
-	#include <soc/intel/baytrail/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/reef/dsdt.asl

@@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <soc/intel/apollolake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/apollolake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/sarien/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <soc/intel/cannonlake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/cannonlake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PWRB)

src/mainboard/google/slippy/dsdt.asl

@@ -37,7 +37,7 @@ DefinitionBlock(
 	//#include "acpi/gpe.asl"
 
 	// CPU
-	#include <cpu/intel/haswell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/stout/dsdt.asl

@@ -40,7 +40,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/google/zoombini/dsdt.asl

@@ -35,7 +35,7 @@ DefinitionBlock(
 	#include <soc/intel/cannonlake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/cannonlake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/hp/2570p/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/2760p/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/8460p/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/8470p/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/8770w/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/folio_9470m/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/hp/revolve_810_g1/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/intel/baskingridge/dsdt.asl

@@ -37,7 +37,7 @@ DefinitionBlock(
 
 	#include "acpi/thermal.asl"
 
-	#include <cpu/intel/haswell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/bayleybay_fsp/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
 
-	#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/dcp847ske/dsdt.asl

@@ -26,7 +26,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/intel/emeraldlake2/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/glkrvp/dsdt.asl

@@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <soc/intel/apollolake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/apollolake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/harcuvar/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/denverton_ns/acpi/globalnvs.asl>
 
-	#include <soc/intel/denverton_ns/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/icelake_rvp/dsdt.asl

@@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <soc/intel/icelake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/icelake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/kblrvp/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/kunimitsu/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/leafhill/dsdt.asl

@@ -27,7 +27,7 @@ DefinitionBlock(
 	#include <soc/intel/apollolake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/apollolake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/littleplains/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 
 	#include "acpi/thermal.asl"
 
-	#include <cpu/intel/fsp_model_406dx/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/minnow3/dsdt.asl

@@ -27,7 +27,7 @@ DefinitionBlock(
 	#include <soc/intel/apollolake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/apollolake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/minnowmax/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
 
-	#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/mohonpeak/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 
 	#include "acpi/thermal.asl"
 
-	#include <cpu/intel/fsp_model_406dx/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/saddlebrook/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/strago/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	/* global NVS and variables */
 	#include <acpi/globalnvs.asl>
 
-	#include <acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/intel/wtm2/dsdt.asl

@@ -36,7 +36,7 @@ DefinitionBlock(
 	//#include "acpi/gpe.asl"
 
 	// CPU
-	#include <soc/intel/broadwell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/kontron/ktqm77/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/l520/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/lenovo/s230u/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	#include "acpi/platform.asl"
 	#include "acpi/gpe.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>

src/mainboard/lenovo/t420/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/t420s/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/t430/dsdt.asl

@@ -27,7 +27,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/lenovo/t430s/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/t520/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/t530/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/x131e/dsdt.asl

@@ -28,7 +28,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 
 	// global NVS and variables

src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/x201/dsdt.asl

@@ -40,7 +40,7 @@ DefinitionBlock(
 	/* General Purpose Events */
 	#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/x220/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/lenovo/x230/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/opencellular/rotundu/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
 
-	#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/packardbell/ms2290/dsdt.asl

@@ -33,7 +33,7 @@ DefinitionBlock(
 	/* General Purpose Events */
 	#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/purism/librem_bdw/dsdt.asl

@@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <soc/intel/broadwell/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/broadwell/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/purism/librem_skl/dsdt.asl

@@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <soc/intel/skylake/acpi/globalnvs.asl>
 
 	// CPU
-	#include <soc/intel/skylake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/roda/rv11/dsdt.asl

@@ -37,7 +37,7 @@ DefinitionBlock(
 
 	#include "acpi/alsd.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/samsung/lumpy/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/samsung/stumpy/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 
 	#include "acpi/thermal.asl"
 
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/sapphire/pureplatinumh61/dsdt.asl

@@ -29,7 +29,7 @@ DefinitionBlock(
 {
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include <cpu/intel/model_206ax/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/scaleway/tagada/dsdt.asl

@@ -39,7 +39,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/denverton_ns/acpi/globalnvs.asl>
 
-	#include <soc/intel/denverton_ns/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/siemens/mc_apl1/dsdt.asl

@@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <soc/intel/apollolake/acpi/globalnvs.asl>
 
 	/* CPU */
-	#include <soc/intel/apollolake/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/mainboard/siemens/mc_tcu3/dsdt.asl

@@ -38,7 +38,7 @@ DefinitionBlock(
 	// global NVS and variables
 	#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
 
-	#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
 		Device (PCI0)

src/soc/intel/apollolake/acpi/cpu.asl

@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/baytrail/acpi/cpu.asl

@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/braswell/acpi/cpu.asl

@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/broadwell/acpi/cpu.asl

@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/cannonlake/acpi/cpu.asl

@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2017 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/denverton_ns/acpi/cpu.asl

@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
- * Copyright (C) 2014 - 2017 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/fsp_baytrail/acpi/cpu.asl

@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/icelake/acpi/cpu.asl

@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2018 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}

src/soc/intel/skylake/acpi/cpu.asl

@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* These come from the dynamically created CPU SSDT */
-External (\_PR.CNOT, MethodObj)
-
-/* Notify OS to re-read CPU tables */
-Method (PNOT)
-{
-	\_PR.CNOT (0x81)
-}
-
-/* Notify OS to re-read CPU _PPC limit */
-Method (PPCN)
-{
-	\_PR.CNOT (0x80)
-}
-
-/* Notify OS to re-read Throttle Limit tables */
-Method (TNOT)
-{
-	\_PR.CNOT (0x82)
-}