cpu/intel/common: Use a common acpi/cpu.asl file
Change-Id: Ifa5a3a22771ff2e0efa14fb765603fd5e0440d59 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29894 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: David Guckian
This commit is contained in:
parent
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commit
aaced4a932
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@ -1,36 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* These come from the dynamically created CPU SSDT */
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External (\_PR.CNOT, MethodObj)
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/* Notify OS to re-read CPU tables */
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Method (PNOT)
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{
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\_PR.CNOT (0x81)
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}
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/* Notify OS to re-read CPU _PPC limit */
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Method (PPCN)
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{
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\_PR.CNOT (0x80)
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}
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/* Notify OS to re-read Throttle Limit tables */
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Method (TNOT)
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{
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\_PR.CNOT (0x82)
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}
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@ -1,36 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* These come from the dynamically created CPU SSDT */
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External (\_PR.CNOT, MethodObj)
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/* Notify OS to re-read CPU tables */
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Method (PNOT)
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{
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\_PR.CNOT (0x81)
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}
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/* Notify OS to re-read CPU _PPC limit */
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Method (PPCN)
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{
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\_PR.CNOT (0x80)
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}
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/* Notify OS to re-read Throttle Limit tables */
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Method (TNOT)
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{
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\_PR.CNOT (0x82)
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}
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@ -38,7 +38,7 @@ DefinitionBlock(
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#include "acpi/thermal.asl"
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#include <cpu/intel/fsp_model_406dx/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -26,7 +26,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -29,7 +29,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -28,7 +28,7 @@ DefinitionBlock(
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
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#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
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#include <cpu/intel/haswell/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB)
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{
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
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@ -27,7 +27,7 @@ DefinitionBlock(
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// Some generic macros
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#include "acpi/platform.asl"
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#include "acpi/superio.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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@ -29,7 +29,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -38,7 +38,7 @@ DefinitionBlock(
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// global NVS and variables
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#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
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#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -25,7 +25,7 @@ DefinitionBlock(
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
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@ -25,7 +25,7 @@ DefinitionBlock(
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
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@ -29,7 +29,7 @@ DefinitionBlock(
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#include "acpi/platform.asl"
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#include "acpi/superio.asl"
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#include "acpi/thermal.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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@ -37,7 +37,7 @@ DefinitionBlock(
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//#include "acpi/gpe.asl"
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// CPU
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#include <soc/intel/broadwell/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -34,7 +34,7 @@ DefinitionBlock(
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#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
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// CPU
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#include <cpu/intel/haswell/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -39,7 +39,7 @@ DefinitionBlock(
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// General Purpose Events
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//#include "acpi/gpe.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -31,7 +31,7 @@ DefinitionBlock(
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/* global NVS and variables */
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#include <acpi/globalnvs.asl>
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#include <acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -33,7 +33,7 @@ DefinitionBlock(
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#include <soc/intel/icelake/acpi/globalnvs.asl>
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// CPU
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#include <soc/intel/icelake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -33,7 +33,7 @@ DefinitionBlock(
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#include <soc/intel/skylake/acpi/globalnvs.asl>
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/* CPU */
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#include <soc/intel/skylake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB)
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{
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@ -33,7 +33,7 @@ DefinitionBlock(
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#include <soc/intel/skylake/acpi/globalnvs.asl>
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/* CPU */
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#include <soc/intel/skylake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB)
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{
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@ -32,7 +32,7 @@ DefinitionBlock(
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#include <soc/intel/skylake/acpi/globalnvs.asl>
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// CPU
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#include <soc/intel/skylake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -37,7 +37,7 @@ DefinitionBlock(
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//#include "acpi/gpe.asl"
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// CPU
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#include <soc/intel/broadwell/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -40,7 +40,7 @@ DefinitionBlock(
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//#include "acpi/gpe.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -30,7 +30,7 @@ DefinitionBlock(
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#include <soc/intel/apollolake/acpi/globalnvs.asl>
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/* CPU */
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#include <soc/intel/apollolake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -38,7 +38,7 @@ DefinitionBlock(
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// General Purpose Events
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//#include "acpi/gpe.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -33,7 +33,7 @@ DefinitionBlock(
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#include <soc/intel/skylake/acpi/globalnvs.asl>
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/* CPU */
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#include <soc/intel/skylake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB)
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{
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@ -32,7 +32,7 @@ DefinitionBlock(
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// global NVS and variables
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#include <soc/intel/baytrail/acpi/globalnvs.asl>
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#include <soc/intel/baytrail/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -30,7 +30,7 @@ DefinitionBlock(
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#include <soc/intel/apollolake/acpi/globalnvs.asl>
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/* CPU */
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#include <soc/intel/apollolake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -32,7 +32,7 @@ DefinitionBlock(
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#include <soc/intel/cannonlake/acpi/globalnvs.asl>
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/* CPU */
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#include <soc/intel/cannonlake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PWRB)
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@ -37,7 +37,7 @@ DefinitionBlock(
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//#include "acpi/gpe.asl"
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// CPU
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#include <cpu/intel/haswell/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -40,7 +40,7 @@ DefinitionBlock(
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// General Purpose Events
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//#include "acpi/gpe.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -35,7 +35,7 @@ DefinitionBlock(
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#include <soc/intel/cannonlake/acpi/globalnvs.asl>
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// CPU
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#include <soc/intel/cannonlake/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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|
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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@ -28,7 +28,7 @@ DefinitionBlock(
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{
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// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
/* global NVS and variables. */
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
|
|
@ -28,7 +28,7 @@ DefinitionBlock(
|
|||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
/* global NVS and variables. */
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
|
|
@ -37,7 +37,7 @@ DefinitionBlock(
|
|||
|
||||
#include "acpi/thermal.asl"
|
||||
|
||||
#include <cpu/intel/haswell/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
|
||||
|
||||
#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -26,7 +26,7 @@ DefinitionBlock(
|
|||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
/* global NVS and variables. */
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
// General Purpose Events
|
||||
//#include "acpi/gpe.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -30,7 +30,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/apollolake/acpi/globalnvs.asl>
|
||||
|
||||
/* CPU */
|
||||
#include <soc/intel/apollolake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <soc/intel/denverton_ns/acpi/globalnvs.asl>
|
||||
|
||||
#include <soc/intel/denverton_ns/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -33,7 +33,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/icelake/acpi/globalnvs.asl>
|
||||
|
||||
// CPU
|
||||
#include <soc/intel/icelake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -32,7 +32,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/skylake/acpi/globalnvs.asl>
|
||||
|
||||
// CPU
|
||||
#include <soc/intel/skylake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -32,7 +32,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/skylake/acpi/globalnvs.asl>
|
||||
|
||||
// CPU
|
||||
#include <soc/intel/skylake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/apollolake/acpi/globalnvs.asl>
|
||||
|
||||
/* CPU */
|
||||
#include <soc/intel/apollolake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
|
||||
#include "acpi/thermal.asl"
|
||||
|
||||
#include <cpu/intel/fsp_model_406dx/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/apollolake/acpi/globalnvs.asl>
|
||||
|
||||
/* CPU */
|
||||
#include <soc/intel/apollolake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
|
||||
|
||||
#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
|
||||
#include "acpi/thermal.asl"
|
||||
|
||||
#include <cpu/intel/fsp_model_406dx/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -32,7 +32,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/skylake/acpi/globalnvs.asl>
|
||||
|
||||
// CPU
|
||||
#include <soc/intel/skylake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -32,7 +32,7 @@ DefinitionBlock(
|
|||
/* global NVS and variables */
|
||||
#include <acpi/globalnvs.asl>
|
||||
|
||||
#include <acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -36,7 +36,7 @@ DefinitionBlock(
|
|||
//#include "acpi/gpe.asl"
|
||||
|
||||
// CPU
|
||||
#include <soc/intel/broadwell/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// General Purpose Events
|
||||
//#include "acpi/gpe.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -28,7 +28,7 @@ DefinitionBlock(
|
|||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
/* global NVS and variables. */
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
|
|
@ -28,7 +28,7 @@ DefinitionBlock(
|
|||
{
|
||||
#include "acpi/platform.asl"
|
||||
#include "acpi/gpe.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -27,7 +27,7 @@ DefinitionBlock(
|
|||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
/* global NVS and variables. */
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -28,7 +28,7 @@ DefinitionBlock(
|
|||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
|
||||
// global NVS and variables
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -40,7 +40,7 @@ DefinitionBlock(
|
|||
/* General Purpose Events */
|
||||
#include "acpi/gpe.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
|
||||
|
||||
#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -33,7 +33,7 @@ DefinitionBlock(
|
|||
/* General Purpose Events */
|
||||
#include "acpi/gpe.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -30,7 +30,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/broadwell/acpi/globalnvs.asl>
|
||||
|
||||
/* CPU */
|
||||
#include <soc/intel/broadwell/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -32,7 +32,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/skylake/acpi/globalnvs.asl>
|
||||
|
||||
// CPU
|
||||
#include <soc/intel/skylake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -37,7 +37,7 @@ DefinitionBlock(
|
|||
|
||||
#include "acpi/alsd.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
// General Purpose Events
|
||||
//#include "acpi/gpe.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
|
||||
#include "acpi/thermal.asl"
|
||||
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -29,7 +29,7 @@ DefinitionBlock(
|
|||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
#include <cpu/intel/model_206ax/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
|
||||
/* global NVS and variables. */
|
||||
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
||||
|
|
|
@ -39,7 +39,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <soc/intel/denverton_ns/acpi/globalnvs.asl>
|
||||
|
||||
#include <soc/intel/denverton_ns/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -30,7 +30,7 @@ DefinitionBlock(
|
|||
#include <soc/intel/apollolake/acpi/globalnvs.asl>
|
||||
|
||||
/* CPU */
|
||||
#include <soc/intel/apollolake/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -38,7 +38,7 @@ DefinitionBlock(
|
|||
// global NVS and variables
|
||||
#include <soc/intel/fsp_baytrail/acpi/globalnvs.asl>
|
||||
|
||||
#include <soc/intel/fsp_baytrail/acpi/cpu.asl>
|
||||
#include <cpu/intel/common/acpi/cpu.asl>
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
|
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,36 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2011 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,36 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2011 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2017 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,37 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
|
||||
* Copyright (C) 2014 - 2017 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,36 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2011 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2018 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External (\_PR.CNOT, MethodObj)
|
||||
|
||||
/* Notify OS to re-read CPU tables */
|
||||
Method (PNOT)
|
||||
{
|
||||
\_PR.CNOT (0x81)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read CPU _PPC limit */
|
||||
Method (PPCN)
|
||||
{
|
||||
\_PR.CNOT (0x80)
|
||||
}
|
||||
|
||||
/* Notify OS to re-read Throttle Limit tables */
|
||||
Method (TNOT)
|
||||
{
|
||||
\_PR.CNOT (0x82)
|
||||
}
|
Loading…
Reference in New Issue