kbuild: automatically include SOCs
This change switches all SOC vendors and southbridges to be autoincluded by Makefile.inc, rather than having to be mentioned explicitly in soc/Makefile.inc or in soc/<vendor>/Makefile.inc. This means, vendor and SOC directories are now "drop in", e.g. be placed in the coreboot directory hierarchy without having to modify any higher level coreboot files. The long term plan is to enable out of tree components to be built with a given coreboot version (given that the API did not change). Change-Id: Iede26fe184b09c53cec23a545d04953701cbc41d Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9799 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
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@ -54,7 +54,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs
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# root source directories of coreboot
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subdirs-y := src/lib src/console src/device
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subdirs-y += src/ec/acpi $(wildcard src/ec/*/*) $(wildcard src/southbridge/*/*)
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subdirs-y += src/soc
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subdirs-y += $(wildcard src/soc/*/*)
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subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode
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subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom
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subdirs-y += $(wildcard src/arch/*)
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@ -1,12 +0,0 @@
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################################################################################
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## Subdirectories
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################################################################################
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subdirs-y += broadcom
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subdirs-y += imgtec
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subdirs-y += intel
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subdirs-y += marvell
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subdirs-y += nvidia
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subdirs-y += qualcomm
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subdirs-y += rockchip
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subdirs-y += samsung
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subdirs-y += ucb
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@ -1,20 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2015 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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subdirs-$(CONFIG_SOC_BROADCOM_CYGNUS) += cygnus
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@ -17,6 +17,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifeq ($(CONFIG_SOC_BROADCOM_CYGNUS),y)
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bootblock-y += bootblock.c
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bootblock-y += cbmem.c
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bootblock-y += i2c.c
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@ -102,3 +104,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.tmp \
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$(objutil)/broadcom/secimage/secimage -out $@ \
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-config util/broadcom/unauth.cfg \
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-hmac util/broadcom/khmacsha256 -bl $<
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endif
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@ -1 +0,0 @@
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subdirs-$(CONFIG_CPU_IMGTEC_PISTACHIO) += pistachio
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@ -19,6 +19,8 @@
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# MA 02110-1301 USA
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#
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ifeq ($(CONFIG_CPU_IMGTEC_PISTACHIO),y)
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# We enable CBFS_SPI_WRAPPER for Pistachio targets.
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bootblock-y += clocks.c
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bootblock-y += spi.c
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@ -55,3 +57,4 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw $(BIMGTOOL)
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@printf " BIMGTOOL $(subst $(obj)/,,$(@))\n"
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$(BIMGTOOL) $< $@ $(call loadaddr,bootblock)
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endif
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@ -1,3 +0,0 @@
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subdirs-$(CONFIG_SOC_INTEL_BAYTRAIL) += baytrail
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subdirs-$(CONFIG_SOC_INTEL_BROADWELL) += broadwell
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subdirs-$(CONFIG_SOC_INTEL_FSP_BAYTRAIL) += fsp_baytrail
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@ -1,7 +1,8 @@
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ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
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subdirs-y += bootblock
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subdirs-y += microcode
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subdirs-y += romstage
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subdirs-y += ../common
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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@ -102,3 +103,5 @@ mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x
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mrc.bin-type := mrc
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PHONY += baytrail_add_me
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endif
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@ -1,7 +1,8 @@
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ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
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subdirs-y += bootblock
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subdirs-y += microcode
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subdirs-y += romstage
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subdirs-y += ../common
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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@ -128,3 +129,5 @@ cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin
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mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
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mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ),$(CONFIG_MRC_BIN_ADDRESS))
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mrc.bin-type := mrc
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endif
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@ -1,6 +1,10 @@
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ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL)$(CONFIG_SOC_INTEL_BROADWELL),y)
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ramstage-y += hda_verb.c
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ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += nvm.c
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ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
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romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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endif
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@ -17,6 +17,9 @@
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#
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ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y)
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subdirs-y += microcode
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subdirs-y += romstage
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subdirs-y += ../../../cpu/x86/lapic
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@ -87,3 +90,5 @@ endif
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endif
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endif
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endif
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@ -1,20 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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subdirs-$(CONFIG_SOC_MARVELL_BG4CD) += bg4cd
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@ -17,6 +17,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifeq ($(CONFIG_SOC_MARVELL_BG4CD),y)
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bootblock-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += bootblock_asm.S
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bootblock-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += bootblock.c
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@ -50,3 +52,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf "Generating: $(subst $(obj)/,,$(@))\n"
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@mkdir -p $(dir $@)
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@mv $< $@
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endif
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@ -1,2 +0,0 @@
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subdirs-$(CONFIG_SOC_NVIDIA_TEGRA124) += tegra124
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subdirs-$(CONFIG_SOC_NVIDIA_TEGRA132) += tegra132
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@ -1,3 +1,5 @@
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ifeq ($(CONFIG_SOC_NVIDIA_TEGRA124),y)
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bootblock-y += bootblock.c
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bootblock-y += bootblock_asm.S
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bootblock-y += cbfs.c
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@ -102,3 +104,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE)
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echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER)
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@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
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$(CBOOTIMAGE) $(BCT_WRAPPER) $@
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endif
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@ -1,3 +1,5 @@
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ifeq ($(CONFIG_SOC_NVIDIA_TEGRA132),y)
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bootblock-y += bootblock.c
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bootblock-y += bootblock_asm.S
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bootblock-y += cbfs.c
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@ -150,3 +152,5 @@ MTS_FILE_CBFS = mts
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cbfs-files-y += $(MTS_FILE_CBFS)
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$(MTS_FILE_CBFS)-file := $(MTS_FILE)
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$(MTS_FILE_CBFS)-type := raw
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endif
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@ -1 +0,0 @@
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subdirs-$(CONFIG_SOC_QC_IPQ806X) += ipq806x
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@ -17,6 +17,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifeq ($(CONFIG_SOC_QC_IPQ806X),y)
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bootblock-y += clock.c
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bootblock-y += gpio.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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@ -88,3 +90,5 @@ mbn-root := 3rdparty/cpu/qualcomm/ipq806x
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$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\
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$(eval $(f)-file := $(mbn-root)/$(f))\
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$(eval $(f)-type := raw))
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endif
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@ -1,20 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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subdirs-$(CONFIG_SOC_ROCKCHIP_RK3288) += rk3288
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@ -17,6 +17,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
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IDBTOOL = util/rockchip/make_idb.py
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#bootblock-y += bootblock.c
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@ -79,3 +81,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf "Generating: $(subst $(obj)/,,$(@))\n"
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@mkdir -p $(dir $@)
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@$(IDBTOOL) --from=$< --to=$@ --enable-align
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endif
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@ -1,2 +0,0 @@
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subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5250) += exynos5250
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subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5420) += exynos5420
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@ -1,3 +1,5 @@
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ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5250),y)
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bootblock-y += spi.c alternate_cbfs.c
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bootblock-y += bootblock.c
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bootblock-y += pinmux.c timer.c power.c
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@ -51,3 +53,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
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util/exynos/fixed_cksum.py $< $<.cksum 32768
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cat 3rdparty/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@
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endif
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@ -1,3 +1,5 @@
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ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5420),y)
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bootblock-y += spi.c alternate_cbfs.c
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bootblock-y += bootblock.c
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bootblock-y += pinmux.c timer.c power.c
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@ -53,3 +55,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
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util/exynos/variable_cksum.py $< $<.cksum
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cat 3rdparty/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
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endif
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@ -1 +0,0 @@
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subdirs-$(CONFIG_SOC_UCB_RISCV) += riscv
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@ -1,3 +1,6 @@
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romstage-y += cbmem.c
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ifeq ($(CONFIG_SOC_UCB_RISCV),y)
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romstage-y += cbmem.c
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ramstage-y += cbmem.c
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endif
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