kbuild: automatically include SOCs

This change switches all SOC vendors and southbridges
to be autoincluded by Makefile.inc, rather than having to be
mentioned explicitly in soc/Makefile.inc or in
soc/<vendor>/Makefile.inc.

This means, vendor and SOC directories are now "drop
in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree components to be
built with a given coreboot version (given that the API did not
change).

Change-Id: Iede26fe184b09c53cec23a545d04953701cbc41d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9799
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Stefan Reinauer 2015-04-27 14:03:57 -07:00
parent 77c04e95ba
commit aae53ab76a
25 changed files with 57 additions and 86 deletions

View File

@ -54,7 +54,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs
# root source directories of coreboot
subdirs-y := src/lib src/console src/device
subdirs-y += src/ec/acpi $(wildcard src/ec/*/*) $(wildcard src/southbridge/*/*)
subdirs-y += src/soc
subdirs-y += $(wildcard src/soc/*/*)
subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode
subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom
subdirs-y += $(wildcard src/arch/*)

View File

@ -1,12 +0,0 @@
################################################################################
## Subdirectories
################################################################################
subdirs-y += broadcom
subdirs-y += imgtec
subdirs-y += intel
subdirs-y += marvell
subdirs-y += nvidia
subdirs-y += qualcomm
subdirs-y += rockchip
subdirs-y += samsung
subdirs-y += ucb

View File

@ -1,20 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright 2015 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
subdirs-$(CONFIG_SOC_BROADCOM_CYGNUS) += cygnus

View File

@ -17,6 +17,8 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ifeq ($(CONFIG_SOC_BROADCOM_CYGNUS),y)
bootblock-y += bootblock.c
bootblock-y += cbmem.c
bootblock-y += i2c.c
@ -102,3 +104,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.tmp \
$(objutil)/broadcom/secimage/secimage -out $@ \
-config util/broadcom/unauth.cfg \
-hmac util/broadcom/khmacsha256 -bl $<
endif

View File

@ -1 +0,0 @@
subdirs-$(CONFIG_CPU_IMGTEC_PISTACHIO) += pistachio

View File

@ -19,6 +19,8 @@
# MA 02110-1301 USA
#
ifeq ($(CONFIG_CPU_IMGTEC_PISTACHIO),y)
# We enable CBFS_SPI_WRAPPER for Pistachio targets.
bootblock-y += clocks.c
bootblock-y += spi.c
@ -55,3 +57,4 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw $(BIMGTOOL)
@printf " BIMGTOOL $(subst $(obj)/,,$(@))\n"
$(BIMGTOOL) $< $@ $(call loadaddr,bootblock)
endif

View File

@ -1,3 +0,0 @@
subdirs-$(CONFIG_SOC_INTEL_BAYTRAIL) += baytrail
subdirs-$(CONFIG_SOC_INTEL_BROADWELL) += broadwell
subdirs-$(CONFIG_SOC_INTEL_FSP_BAYTRAIL) += fsp_baytrail

View File

@ -1,7 +1,8 @@
ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
subdirs-y += bootblock
subdirs-y += microcode
subdirs-y += romstage
subdirs-y += ../common
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/smm
@ -102,3 +103,5 @@ mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x
mrc.bin-type := mrc
PHONY += baytrail_add_me
endif

View File

@ -1,7 +1,8 @@
ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
subdirs-y += bootblock
subdirs-y += microcode
subdirs-y += romstage
subdirs-y += ../common
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/smm
@ -128,3 +129,5 @@ cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin
mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ),$(CONFIG_MRC_BIN_ADDRESS))
mrc.bin-type := mrc
endif

View File

@ -1,6 +1,10 @@
ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL)$(CONFIG_SOC_INTEL_BROADWELL),y)
ramstage-y += hda_verb.c
ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += nvm.c
ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
endif

View File

@ -17,6 +17,9 @@
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y)
subdirs-y += microcode
subdirs-y += romstage
subdirs-y += ../../../cpu/x86/lapic
@ -87,3 +90,5 @@ endif
endif
endif
endif

View File

@ -1,20 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
subdirs-$(CONFIG_SOC_MARVELL_BG4CD) += bg4cd

View File

@ -17,6 +17,8 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ifeq ($(CONFIG_SOC_MARVELL_BG4CD),y)
bootblock-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += bootblock_asm.S
bootblock-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += bootblock.c
@ -50,3 +52,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
@mv $< $@
endif

View File

@ -1,2 +0,0 @@
subdirs-$(CONFIG_SOC_NVIDIA_TEGRA124) += tegra124
subdirs-$(CONFIG_SOC_NVIDIA_TEGRA132) += tegra132

View File

@ -1,3 +1,5 @@
ifeq ($(CONFIG_SOC_NVIDIA_TEGRA124),y)
bootblock-y += bootblock.c
bootblock-y += bootblock_asm.S
bootblock-y += cbfs.c
@ -102,3 +104,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE)
echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER)
@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
$(CBOOTIMAGE) $(BCT_WRAPPER) $@
endif

View File

@ -1,3 +1,5 @@
ifeq ($(CONFIG_SOC_NVIDIA_TEGRA132),y)
bootblock-y += bootblock.c
bootblock-y += bootblock_asm.S
bootblock-y += cbfs.c
@ -150,3 +152,5 @@ MTS_FILE_CBFS = mts
cbfs-files-y += $(MTS_FILE_CBFS)
$(MTS_FILE_CBFS)-file := $(MTS_FILE)
$(MTS_FILE_CBFS)-type := raw
endif

View File

@ -1 +0,0 @@
subdirs-$(CONFIG_SOC_QC_IPQ806X) += ipq806x

View File

@ -17,6 +17,8 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ifeq ($(CONFIG_SOC_QC_IPQ806X),y)
bootblock-y += clock.c
bootblock-y += gpio.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c
@ -88,3 +90,5 @@ mbn-root := 3rdparty/cpu/qualcomm/ipq806x
$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\
$(eval $(f)-file := $(mbn-root)/$(f))\
$(eval $(f)-type := raw))
endif

View File

@ -1,20 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Rockchip Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
subdirs-$(CONFIG_SOC_ROCKCHIP_RK3288) += rk3288

View File

@ -17,6 +17,8 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
IDBTOOL = util/rockchip/make_idb.py
#bootblock-y += bootblock.c
@ -79,3 +81,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
@$(IDBTOOL) --from=$< --to=$@ --enable-align
endif

View File

@ -1,2 +0,0 @@
subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5250) += exynos5250
subdirs-$(CONFIG_CPU_SAMSUNG_EXYNOS5420) += exynos5420

View File

@ -1,3 +1,5 @@
ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5250),y)
bootblock-y += spi.c alternate_cbfs.c
bootblock-y += bootblock.c
bootblock-y += pinmux.c timer.c power.c
@ -51,3 +53,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/fixed_cksum.py $< $<.cksum 32768
cat 3rdparty/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@
endif

View File

@ -1,3 +1,5 @@
ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5420),y)
bootblock-y += spi.c alternate_cbfs.c
bootblock-y += bootblock.c
bootblock-y += pinmux.c timer.c power.c
@ -53,3 +55,5 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/variable_cksum.py $< $<.cksum
cat 3rdparty/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
endif

View File

@ -1 +0,0 @@
subdirs-$(CONFIG_SOC_UCB_RISCV) += riscv

View File

@ -1,3 +1,6 @@
romstage-y += cbmem.c
ifeq ($(CONFIG_SOC_UCB_RISCV),y)
romstage-y += cbmem.c
ramstage-y += cbmem.c
endif