soc/intel: Update api name for getting spi destination id

Update api name and comments to be more generic as spi destination
id is not DMI specific.
Update api name as soc_get_spi_psf_destination_id and comments.
And move PSF definition from pcr_ids.h as it's not pcr id.

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ie338d05649d23bddae5355dc6ce8440dfb183073
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>

src/soc/intel/alderlake/include/soc/pcr_ids.h

@@ -40,9 +40,4 @@
 #define PID_CPU_GPIOCOM4	0xb9
 #define PID_CPU_GPIOCOM5	0xba
 
-/*
- * SPI - DMI Destination ID
- */
-#define SPI_DMI_DESTINATION_ID  0x23a8
-
 #endif

src/soc/intel/alderlake/spi.c

@@ -9,7 +9,8 @@
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/spi.h>
 #include <soc/pci_devs.h>
-#include <soc/pcr_ids.h>
+
+#define PSF_SPI_DESTINATION_ID	0x23a8
 
 int spi_soc_devfn_to_bus(unsigned int devfn)
 {
@@ -28,7 +29,7 @@ int spi_soc_devfn_to_bus(unsigned int devfn)
 	return -1;
 }
 
-uint32_t soc_get_spi_dmi_destination_id(void)
+uint32_t soc_get_spi_psf_destination_id(void)
 {
-	return SPI_DMI_DESTINATION_ID;
+	return PSF_SPI_DESTINATION_ID;
 }

src/soc/intel/common/block/fast_spi/fast_spi.c

@@ -325,9 +325,9 @@ static void fast_spi_enable_ext_bios(void)
 		       "Only 32MiB windows are supported for extended BIOS!");
 #endif
 
-	/* Configure DMI Source decode for Extended BIOS Region */
+	/* Configure Source decode for Extended BIOS Region */
 	if (dmi_enable_gpmr(CONFIG_EXT_BIOS_WIN_BASE, CONFIG_EXT_BIOS_WIN_SIZE,
-				soc_get_spi_dmi_destination_id()) == CB_ERR)
+				soc_get_spi_psf_destination_id()) == CB_ERR)
 		return;
 
 	/* Program EXT_BIOS_BAR1 with obtained ext_bios_base */

src/soc/intel/common/block/include/intelblocks/fast_spi.h

@@ -87,9 +87,9 @@ void fast_spi_disable_wp(void);
  */
 void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size);
 /*
- * SOC function to get SPI-DMI Destination Id
+ * SOC function to get SPI PSF Destination Id
  */
-uint32_t soc_get_spi_dmi_destination_id(void);
+uint32_t soc_get_spi_psf_destination_id(void);
 /*
  * Add MTRR for extended BIOS region(when supported) to postcar frame
  */

src/soc/intel/tigerlake/include/soc/pcr_ids.h

@@ -39,13 +39,4 @@
 #define PID_CPU_GPIOCOM4	0xb9
 #define PID_CPU_GPIOCOM5	0xba
 
-/*
- * SPI - DMI Destination ID
- */
-#if CONFIG(SOC_INTEL_TIGERLAKE_PCH_H)
-#define SPI_DMI_DESTINATION_ID	0x23b0
-#else
-#define SPI_DMI_DESTINATION_ID	0x23a8
-#endif
-
 #endif

src/soc/intel/tigerlake/spi.c

@@ -9,7 +9,9 @@
 #include <intelblocks/spi.h>
 #include <intelblocks/fast_spi.h>
 #include <soc/pci_devs.h>
-#include <soc/pcr_ids.h>
+
+#define PSF_SPI_DESTINATION_ID_H	0x23b0
+#define PSF_SPI_DESTINATION_ID		0x23a8
 
 int spi_soc_devfn_to_bus(unsigned int devfn)
 {
@@ -26,7 +28,9 @@ int spi_soc_devfn_to_bus(unsigned int devfn)
 	return -1;
 }
 
-uint32_t soc_get_spi_dmi_destination_id(void)
+uint32_t soc_get_spi_psf_destination_id(void)
 {
-	return SPI_DMI_DESTINATION_ID;
+	if (CONFIG(SOC_INTEL_TIGERLAKE_PCH_H))
+		return PSF_SPI_DESTINATION_ID_H;
+	return PSF_SPI_DESTINATION_ID;
 }