GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

broadwell: Disable XHCI compliance mode entry 

To avoid entries with Type-C alternate mode devices disable
compliance mode entry.  This needs to be set on both boot
and resume.

BUG=chrome-os-partner:35320
BRANCH=samus
TEST=manual:
1) boot on samus with USB keyboard plugged in -> controller in D0 at boot
2) iotools mmio_read32 0xe12080ec == 0x18010c01
3) suspend and resume
4) iotools mmio_read32 0xe12080ec == 0x18010c01
5) remove USB keyboard -> controller in D3
6) iotools mmio_read32 0xe12080ec == 0xffffffff
7) plug in USB keyboard -> controller in D0
8) iotools mmio_read32 0xe12080ec == 0x18010c01
9) boot with no external USB devices -> controller in D3 at boot
10) iotools mmio_read32 0xe12080ec == 0xffffffff
11) plug in USB keyboard -> controller in D0
12) iotools mmio_read32 0xe12080ec == 0x18010c01

Change-Id: I4d566112b3c188bafdf9a4bbd92944c89500e3e8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: db8c8ab8ff25f6a39cd50dcc91b5ba9fd7d05059
Original-Change-Id: I8b68ba75e254a7e236c869f4470207eb5290053d
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/251361
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9782
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Duncan Laurie 2015-02-19 16:21:10 -08:00 committed by Patrick Georgi
parent 2f2a5e54a7
commit aafdddfc38
1 changed files with 19 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/soc/intel/broadwell/xhci.c
View File

@ -192,11 +192,30 @@ void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ)
}
#else /* !__SMM__ */
static void xhci_init(struct device *dev)
{
struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
u16 reg16;
u32 reg32;
/* Ensure controller is in D0 state */
reg16 = pci_read_config16(dev, XHCI_PWR_CTL_STS);
reg16 &= ~XHCI_PWR_CTL_SET_MASK;
reg16 |= XHCI_PWR_CTL_SET_D0;
pci_write_config16(dev, XHCI_PWR_CTL_STS, reg16);
/* Disable Compliance Mode Entry */
reg32 = read32(res2mmio(res, 0x80ec, 0));
reg32 |= (1 << 0);
write32(res2mmio(res, 0x80ec, 0), reg32);
}
static struct device_operations usb_xhci_ops = {
.read_resources = &pci_dev_read_resources,
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.ops_pci = &broadwell_pci_ops,
.init = &xhci_init,
};
static const unsigned short pci_device_ids[] = {