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mb/google/volteer: Update devicetree based on EDS 

Update device enable/disable based on PCH EDS#576591 vol1 rev1.2

BRANCH=none
BUG=b:154037185
TEST= boot up OS in volteer and check and check lspci
Unsupported IP should be visable from lspci result

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: I61a328da1014ab7584c3ec789971a106c7a0a403
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40394
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wonkyu Kim 2020-04-15 00:15:22 -07:00 committed by Patrick Georgi
parent 85ecdb1471
commit ab0da17856
1 changed files with 0 additions and 14 deletions
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14
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
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@ -227,24 +227,14 @@ chip soc/intel/tigerlake
device pci 0e.0 off end # VMD 0x9A0B
# From PCH EDS(576591)
device pci 10.0 on end # I2C6 0xA0D8
device pci 10.1 off end # I2C7 0xA0D9
device pci 10.2 on end # CNVi: BT 0xA0F5 - A0F7
device pci 10.6 off end # THC0 0xA0D0
device pci 10.7 off end # THC1 0xA0D1
device pci 11.0 off end # UART3 0xA0DA
device pci 11.1 off end # UART4 0xA0DB
device pci 11.2 off end # UART5 0xA0DC
device pci 11.3 off end # UART6 0xA0DD
device pci 12.0 off end # SensorHUB 0xA0FC
device pci 12.6 off end # GSPI2 0x34FB
device pci 13.0 off end # GSPI3 0xA0FD
device pci 13.1 off end # GSPI4 0xA0FE
device pci 13.2 off end # GSPI5 0xA0DE
device pci 13.3 off end # GSPI6 0xA0DF
device pci 14.0 on end # USB3.1 xHCI 0xA0ED
device pci 14.1 off end # USB3.1 xDCI 0xA0EE
@ -337,10 +327,6 @@ chip soc/intel/tigerlake
device pci 1d.1 off end # RP10 0xA0B1
device pci 1d.2 on end # RP11 0xA0B2
device pci 1d.3 off end # RP12 0xA0B3
device pci 1d.4 off end # RP13 0xA0B4
device pci 1d.5 off end # RP14 0xA0B5
device pci 1d.6 off end # RP15 0xA0B6
device pci 1d.7 off end # RP16 0xA0B7
device pci 1e.0 on end # UART0 0xA0A8
device pci 1e.1 off end # UART1 0xA0A9