urara: introduce board skeleton
Not much is happening yet, when the board is enabled (in the next patch), all three components build successfully, the map files show them placed where expected and the bopotblock is wrappeed in a BIMG header. BUG=chrome-os-partner:31438 TEST=when config is enabled, emerge-urara coreboot succeeds. more extensive testing to come later Change-Id: Ib7396189f4bee0fdd6a8ce5c9ab1277806cb5dcc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1ca9efe59a7fcb99412410d509a7f9a91b6ef3ec Original-Change-Id: I573cfb70f5c1e612dfa0a55d3d22d92f00584c66 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/214600 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9047 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -59,6 +59,8 @@ config BOARD_GOOGLE_STORM
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bool "Storm"
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bool "Storm"
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config BOARD_GOOGLE_STOUT
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config BOARD_GOOGLE_STOUT
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bool "Stout"
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bool "Stout"
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config BOARD_GOOGLE_URARA
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bool "Urara"
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config BOARD_GOOGLE_VEYRON_PINKY
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config BOARD_GOOGLE_VEYRON_PINKY
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bool "Veyron_Pinky"
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bool "Veyron_Pinky"
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@ -83,6 +85,7 @@ source "src/mainboard/google/samus/Kconfig"
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source "src/mainboard/google/slippy/Kconfig"
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source "src/mainboard/google/slippy/Kconfig"
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source "src/mainboard/google/storm/Kconfig"
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source "src/mainboard/google/storm/Kconfig"
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source "src/mainboard/google/stout/Kconfig"
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source "src/mainboard/google/stout/Kconfig"
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source "src/mainboard/google/urara/Kconfig"
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source "src/mainboard/google/veyron_pinky/Kconfig"
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source "src/mainboard/google/veyron_pinky/Kconfig"
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config MAINBOARD_VENDOR
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config MAINBOARD_VENDOR
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@ -0,0 +1,49 @@
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2014 Imagination Technologies
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; version 2 of
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# the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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# MA 02110-1301 USA
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#
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if BOARD_GOOGLE_URARA
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOOTBLOCK_CONSOLE
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select CONFIG_SPI_FLASH_WINBOND
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select CPU_IMGTEC_DANUBE
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select COMMON_CBFS_SPI_WRAPPER
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select MAINBOARD_HAS_BOOTBLOCK_INIT
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select SPI_FLASH
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config MAINBOARD_DIR
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string
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default "google/urara"
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config MAINBOARD_PART_NUMBER
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string
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default "ImgTec Danube Virtual Platform"
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config SYS_SDRAM_BASE
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hex "SDRAM base address"
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default 0x80000000
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config DRAM_SIZE_MB
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int
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default 256
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endif
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@ -0,0 +1,23 @@
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#
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# This file is part of the coreboot project.
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#
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# Copyright 2014 Imagination Technologies Ltd.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; version 2 of
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# the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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# MA 02110-1301 USA
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#
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ramstage-y += mainboard.c
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@ -0,0 +1,26 @@
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2014 Imagination Technologies
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; version 2 of
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# the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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# MA 02110-1301 USA
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#
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chip soc/imgtec/danube
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chip drivers/generic/generic # I2C0 controller
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device i2c 6 on end # Fake component for testing
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end
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end
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@ -0,0 +1,33 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Imagination Technologies
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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static void mainboard_enable(device_t dev)
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{
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printk(BIOS_INFO, "Enable Danube device...\n");
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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