soc/amd/picasso: add and use CPUIDs for older steppings
Change-Id: Ibe768ef7cd714c17fd5a296d9a3e5f963ae0ef01 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41641 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -115,9 +115,10 @@ static struct device_operations cpu_dev_ops = {
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};
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static struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_AMD, 0x810f80 },
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{ X86_VENDOR_AMD, PICASSO_CPUID },
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{ X86_VENDOR_AMD, RAVEN2_CPUID },
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{ X86_VENDOR_AMD, PICASSO_B0_CPUID },
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{ X86_VENDOR_AMD, PICASSO_B1_CPUID },
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{ X86_VENDOR_AMD, RAVEN2_A0_CPUID },
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{ X86_VENDOR_AMD, RAVEN2_A1_CPUID },
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{ 0, 0 },
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};
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@ -11,8 +11,10 @@ void picasso_init_cpus(struct device *dev);
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int get_cpu_count(void);
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void check_mca(void);
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#define RAVEN1_CPUID 0x00810f10
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#define PICASSO_CPUID 0x00810f81
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#define RAVEN2_CPUID 0x00820f01
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#define RAVEN1_B0_CPUID 0x00810f10
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#define PICASSO_B0_CPUID 0x00810f80
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#define PICASSO_B1_CPUID 0x00810f81
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#define RAVEN2_A0_CPUID 0x00820f00
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#define RAVEN2_A1_CPUID 0x00820f01
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#endif /* __PICASSO_CPU_H__ */
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@ -85,25 +85,25 @@ static bool is_mystery_silicon(void)
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static bool is_fam17_1x(void)
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{
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/* mask lower model number nibble and stepping */
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return cpuid_eax(1) >> 8 == PICASSO_CPUID >> 8;
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return cpuid_eax(1) >> 8 == PICASSO_B1_CPUID >> 8;
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}
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static bool is_fam17_11(void)
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{
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/* only mask stepping */
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return cpuid_eax(1) >> 4 == RAVEN1_CPUID >> 4;
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return cpuid_eax(1) >> 4 == RAVEN1_B0_CPUID >> 4;
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}
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static bool is_fam17_18(void)
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{
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/* only mask stepping */
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return cpuid_eax(1) >> 4 == PICASSO_CPUID >> 4;
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return cpuid_eax(1) >> 4 == PICASSO_B1_CPUID >> 4;
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}
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static bool is_fam17_2x(void)
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{
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/* mask lower model number nibble and stepping */
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return cpuid_eax(1) >> 8 == RAVEN2_CPUID >> 8;
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return cpuid_eax(1) >> 8 == RAVEN2_A1_CPUID >> 8;
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}
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static bool is_fam17_20(void)
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