- Added explanation of device tree enable.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jason Schildt 2005-10-13 00:44:34 +00:00
parent 6ab43fcc48
commit ab327a3c08
3 changed files with 9 additions and 0 deletions

View File

@ -66,5 +66,8 @@ void amd8111_enable(device_t dev)
struct chip_operations southbridge_amd_amd8111_ops = {
CHIP_NAME("AMD 8111")
/* This only called when this device is listed in the
* static device tree.
*/
.enable_dev = amd8111_enable,
};

View File

@ -97,6 +97,7 @@ static void acpi_init(struct device *dev)
#endif
/* power on after power fail */
on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
get_option(&on, "power_on_after_fail");
byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
@ -177,6 +178,10 @@ static struct device_operations acpi_ops = {
.enable_resources = acpi_enable_resources,
.init = acpi_init,
.scan_bus = scan_static_bus,
/* We don't need amd8111_enable, chip ops takes care of it.
* It could be useful if these devices were not
* enabled by default.
*/
// .enable = amd8111_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,

View File

@ -55,6 +55,7 @@ static struct device_operations pci_ops = {
.enable_resources = pci_bus_enable_resources,
.init = pci_init,
.scan_bus = pci_scan_bridge,
/* PCI Subordinate bus reset is not implemented */
.ops_pci = &lops_pci,
};