diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 25cc0e4b24..2a86f33362 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -47,6 +47,12 @@ config EC_GOOGLE_CHROMEEC_MEC
 	help
 	  Microchip EC variant for LPC register access.
 
+config EC_GOOGLE_CHROMEEC_PD
+	depends on EC_GOOGLE_CHROMEEC
+	def_bool n
+	help
+	  Indicates that Google's Chrome USB PD chip is present.
+
 config EC_GOOGLE_CHROMEEC_SPI
 	depends on EC_GOOGLE_CHROMEEC
 	def_bool n
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index de58d9750e..e1006dcefc 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -163,9 +163,14 @@ void google_chromeec_check_ec_image(int expected_type)
 /* Check for recovery mode and ensure EC is in RO */
 void google_chromeec_early_init(void)
 {
-	/* If in recovery ensure EC is running RO firmware. */
-	if (recovery_mode_enabled()) {
-		google_chromeec_check_ec_image(EC_IMAGE_RO);
+	if (IS_ENABLED(CONFIG_CHROMEOS)) {
+		/* Check USB PD chip state first */
+		if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_PD))
+			google_chromeec_early_pd_init();
+
+		/* If in recovery ensure EC is running RO firmware. */
+		if (recovery_mode_enabled())
+			google_chromeec_check_ec_image(EC_IMAGE_RO);
 	}
 }