sb/amd/agesa,cimx,pi: Select COMMON_FADT
Change-Id: Ib6a0f8a3beb3d02dfd90234b1af6eccd3cde21bb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41924 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -14,6 +14,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_CF9_RESET
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select HAVE_CF9_RESET_PREPARE
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select COMMON_FADT
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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@ -23,33 +23,10 @@
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* Reference section 5.2.9 Fixed ACPI Description Table (FADT)
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* in the ACPI 3.0b specification.
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*/
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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acpi_header_t *header = &(fadt->header);
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printk(BIOS_DEBUG, "pm_base: 0x%04x\n", HUDSON_ACPI_IO_BASE);
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/* Prepare the header */
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memset((void *)fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = sizeof(acpi_fadt_t);
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header->revision = get_acpi_table_revision(FADT);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = asl_revision;
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if ((uintptr_t)facs > 0xffffffff)
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printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
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else
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fadt->firmware_ctrl = (uintptr_t)facs;
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if ((uintptr_t)dsdt > 0xffffffff)
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printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
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else
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fadt->dsdt = (uintptr_t)dsdt;
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fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */
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fadt->preferred_pm_profile = PM_UNSPECIFIED;
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fadt->sci_int = 9; /* HUDSON - IRQ 09 - ACPI SCI */
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@ -113,11 +90,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */
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fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */
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fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
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fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
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fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
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fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
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fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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@ -181,6 +153,4 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->x_gpe1_blk.access_size = 0;
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fadt->x_gpe1_blk.addrl = 0;
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fadt->x_gpe1_blk.addrh = 0x0;
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header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
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}
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@ -8,6 +8,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
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select AMD_SB_CIMX
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select HAVE_CF9_RESET
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select HAVE_CF9_RESET_PREPARE
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select COMMON_FADT
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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@ -27,34 +27,12 @@
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* Reference section 5.2.9 Fixed ACPI Description Table (FADT)
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* in the ACPI 3.0b specification.
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*/
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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u16 val = 0;
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acpi_header_t *header = &(fadt->header);
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printk(BIOS_DEBUG, "ACPI_BLK_BASE: 0x%04x\n", ACPI_BLK_BASE);
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/* Prepare the header */
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memset((void *)fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = sizeof(acpi_fadt_t);
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header->revision = get_acpi_table_revision(FADT);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = asl_revision;
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if ((uintptr_t)facs > 0xffffffff)
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printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
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else
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fadt->firmware_ctrl = (uintptr_t)facs;
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if ((uintptr_t)dsdt > 0xffffffff)
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printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
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else
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fadt->dsdt = (uintptr_t)dsdt;
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fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */
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fadt->preferred_pm_profile = PM_DESKTOP;
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fadt->sci_int = 9; /* HUDSON 1 - IRQ 09 - ACPI SCI */
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@ -135,11 +113,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->ARM_boot_arch = 0; /* MUST be 0 ACPI 3.0 */
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fadt->FADT_MinorVersion = 0; /* MUST be 0 ACPI 3.0 */
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fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
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fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
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fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
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fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
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fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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@ -200,7 +173,4 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->x_gpe1_blk.access_size = 0;
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fadt->x_gpe1_blk.addrl = 0;
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fadt->x_gpe1_blk.addrh = 0x0;
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header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
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}
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@ -17,6 +17,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_CF9_RESET
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select HAVE_CF9_RESET_PREPARE
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select COMMON_FADT
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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@ -23,25 +23,10 @@
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* Reference section 5.2.9 Fixed ACPI Description Table (FADT)
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* in the ACPI 3.0b specification.
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*/
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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acpi_header_t *header = &(fadt->header);
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printk(BIOS_DEBUG, "pm_base: 0x%04x\n", HUDSON_ACPI_IO_BASE);
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/* Prepare the header */
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memset((void *)fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = sizeof(acpi_fadt_t);
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header->revision = get_acpi_table_revision(FADT);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = asl_revision;
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fadt->firmware_ctrl = (u32) facs;
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fadt->dsdt = (u32) dsdt;
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fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */
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fadt->preferred_pm_profile = PM_UNSPECIFIED;
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fadt->sci_int = 9; /* HUDSON - IRQ 09 - ACPI SCI */
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@ -107,8 +92,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = (u32) dsdt;
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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@ -173,6 +156,4 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->x_gpe1_blk.access_size = 0;
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fadt->x_gpe1_blk.addrl = 0;
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fadt->x_gpe1_blk.addrh = 0x0;
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header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
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}
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