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mb/google/brya/var/yavilla: Add VCM power control sequence 

Add VCM power control to configure 2.8V and reset pin, and VCM can
be powered on/off properly.

BUG=b:292907385
TEST=Run ITS test

Change-Id: I242025836fd50076a40ffcc4e5d4a5d5bc6fb4d0
Signed-off-by: Serin Yeh <serin.yeh@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78170
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Serin Yeh 2023-09-27 17:36:18 +08:00 committed by Felix Held
parent de61edde1b
commit ab6f016a43
1 changed files with 18 additions and 3 deletions
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21
src/mainboard/google/brya/variants/yavilla/overridetree.cb
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@ -375,12 +375,11 @@ chip soc/intel/alderlake
register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
#_ON
register "on_seq.ops_cnt" = "5"
register "on_seq.ops_cnt" = "4"
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
#_OFF
register "off_seq.ops_cnt" = "4"
@ -400,6 +399,22 @@ chip soc/intel/alderlake
register "device_type" = "INTEL_ACPI_CAMERA_VCM"
register "vcm_compat" = ""dongwoon,dw9714""
register "has_power_resource" = "1"
register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
#Controls
register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
register "gpio_panel.gpio[1].gpio_num" = "GPP_D3" # WCAM_RST_L
#_ON
register "on_seq.ops_cnt" = "2"
register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
#_OFF
register "off_seq.ops_cnt" = "2"
register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 0C on
probe WFC WFC_MIPI_OVTI8856