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mb/google/mancomb: Fix S0i3/S3 GPIO configuration 

Using PAD_WAKE is actually wrong. The wake bits are only supposed to be
set when using the GPIO controller to wake the system. coreboot's
current architecture relies on using GPEs to wake the system.

BUG=b:186011392
TEST=none

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ib956fc299fe21cd7ea0b465cbdc5c8da830a668d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52802
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Raul E Rangel 2021-04-30 10:42:18 -06:00 committed by Raul Rangel
parent b1623f23c0
commit ab8cc142a7
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/mancomb/variants/baseboard/gpio.c
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@ -47,7 +47,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* AGPIO21 */ /* AGPIO21 */
PAD_NC(GPIO_21), PAD_NC(GPIO_21),
/* EC_SOC_WAKE_ODL */ /* EC_SOC_WAKE_ODL */
PAD_WAKE(GPIO_22, PULL_NONE, EDGE_LOW, S0i3), PAD_SCI(GPIO_22, PULL_NONE, EDGE_LOW),
/* AC_PRES */ /* AC_PRES */
PAD_NF(GPIO_23, AC_PRES, PULL_UP), PAD_NF(GPIO_23, AC_PRES, PULL_UP),
/* HUB_RST_L */ /* HUB_RST_L */