diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 00e7b86225..8783d4bc02 100755
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -193,13 +193,7 @@ crt0s += $(src)/cpu/x86/sse_enable.inc
 endif
 
 crt0s += $(cpu_incs)
-
-#
-# FIXME move to CPU_INTEL_SOCKET_MPGA604
-#
-ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
-crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
-endif
+crt0s += $(cpu_incs-y)
 
 ifeq ($(CONFIG_LLSHELL),y)
 crt0s += $(src)/arch/x86/llshell/llshell.inc
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
index 2fc27cff78..4fa7569d85 100644
--- a/src/cpu/intel/socket_mPGA604/Kconfig
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -1,5 +1,10 @@
 config CPU_INTEL_SOCKET_MPGA604
 	bool
+
+if CPU_INTEL_SOCKET_MPGA604
+
+config SOCKET_SPECIFIC_OPTIONS # dummy
+	def_bool y
 	select CPU_INTEL_MODEL_F2X
 	select CPU_INTEL_MODEL_F3X
 	select CPU_INTEL_MODEL_F4X
@@ -13,4 +18,14 @@ config CPU_INTEL_SOCKET_MPGA604
 config SSE2
 	bool
 	default n
-	depends on CPU_INTEL_SOCKET_MPGA604
+
+config DCACHE_RAM_BASE
+	hex
+	default 0x0ffafc000
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x4000
+
+endif # CPU_INTEL_SOCKET_MPGA604
+
diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc
index 1404e84bbc..fb1cacd359 100644
--- a/src/cpu/intel/socket_mPGA604/Makefile.inc
+++ b/src/cpu/intel/socket_mPGA604/Makefile.inc
@@ -10,3 +10,5 @@ subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 
+cpu_incs-$(CONFIG_CACHE_AS_RAM) += $(src)/cpu/intel/car/cache_as_ram_ht.inc
+