diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 4d1a536197..4778943cf2 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -13,7 +13,6 @@
 #include <cpu/intel/speedstep.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/name.h>
-#include <cpu/x86/smm.h>
 #include <delay.h>
 #include <northbridge/intel/haswell/haswell.h>
 #include <southbridge/intel/lynxpoint/pch.h>
diff --git a/src/drivers/elog/gsmi.c b/src/drivers/elog/gsmi.c
index cd69d4fd02..ebdde1953c 100644
--- a/src/drivers/elog/gsmi.c
+++ b/src/drivers/elog/gsmi.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <console/console.h>
-#include <cpu/x86/smm.h>
 #include <elog.h>
 
 #define GSMI_RET_SUCCESS		0x00
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c
index 5185e2053a..9b47e71db1 100644
--- a/src/drivers/intel/fsp1_1/car.c
+++ b/src/drivers/intel/fsp1_1/car.c
@@ -6,7 +6,6 @@
 #include <console/console.h>
 #include <commonlib/helpers.h>
 #include <cpu/x86/mtrr.h>
-#include <cpu/x86/smm.h>
 #include <fsp/car.h>
 #include <fsp/util.h>
 #include <program_loading.h>
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index f59f4f5ba7..cd4a1e665e 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -3,7 +3,6 @@
 #include <bootmode.h>
 #include <acpi/acpi.h>
 #include <console/console.h>
-#include <cpu/x86/smm.h>
 #include <fsp/ramstage.h>
 #include <fsp/util.h>
 #include <lib.h>
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 3ffb87e208..da2e8685df 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -4,7 +4,6 @@
 #include <boot_device.h>
 #include <boot/coreboot_tables.h>
 #include <console/console.h>
-#include <cpu/x86/smm.h>
 #include <string.h>
 #include <spi-generic.h>
 #include <spi_flash.h>
diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c
index d80e225609..6e9b490917 100644
--- a/src/mainboard/google/stout/ec.c
+++ b/src/mainboard/google/stout/ec.c
@@ -4,7 +4,6 @@
 #include <bootmode.h>
 #include <types.h>
 #include <console/console.h>
-#include <cpu/x86/smm.h>
 #include <ec/quanta/it8518/ec.h>
 #include <device/device.h>
 #include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index a728e0e8cf..c282aea044 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -11,7 +11,6 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <cpu/x86/smm.h>
 #include <boot/tables.h>
 
 #include "chip.h"
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index a2d5188bdc..595e6a2920 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -8,7 +8,6 @@
 #include <assert.h>
 #include <device/pci_ops.h>
 #include <cbmem.h>
-#include <cpu/x86/smm.h>
 #include <gpio.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 09537a1af3..bdd6e8c9d9 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -9,7 +9,6 @@
 #include <console/console.h>
 #include <cpu/x86/pae.h>
 #include <delay.h>
-#include <cpu/x86/smm.h>
 #include <device/pci_def.h>
 #include <device/resource.h>
 #include <fsp/api.h>
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index bb01844e2d..32b138510b 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 03f77c6c4c..094e1c29fd 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -8,7 +8,6 @@
 #include <bootstate.h>
 #include "chip.h"
 #include <console/console.h>
-#include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 1923301aa2..859db7f1ec 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -14,7 +14,6 @@
 #include <cpu/intel/speedstep.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/name.h>
-#include <cpu/x86/smm.h>
 #include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <soc/cpu.h>
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c
index 35ce010203..b85b663cc4 100644
--- a/src/soc/intel/broadwell/finalize.c
+++ b/src/soc/intel/broadwell/finalize.c
@@ -3,7 +3,6 @@
 #include <bootstate.h>
 #include <console/console.h>
 #include <console/post_codes.h>
-#include <cpu/x86/smm.h>
 #include <reg_script.h>
 #include <spi-generic.h>
 #include <soc/pci_devs.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 59f76cc749..abfd3dee10 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -6,7 +6,6 @@
 #include <cf9_reset.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>
-#include <cpu/x86/smm.h>
 #include <device/pci_ops.h>
 #include <soc/fiamux.h>
 #include <device/mmio.h>
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index bfa59fed80..89b7cb6f9d 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -13,7 +13,6 @@
 #include <cpu/intel/speedstep.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/name.h>
-#include <cpu/x86/smm.h>
 #include <cpu/intel/smm_reloc.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c
index 305aef0d9c..d0eeb04c7c 100644
--- a/src/southbridge/intel/common/pmutil.c
+++ b/src/southbridge/intel/common/pmutil.c
@@ -3,7 +3,6 @@
 #include <types.h>
 #include <console/console.h>
 #include <device/pci_def.h>
-#include <cpu/x86/smm.h>
 #include <southbridge/intel/common/pmbase.h>
 #include <southbridge/intel/common/gpio.h>