cpu/x86/smm/smmhandler.c: Get revision using C code
This allows to remove some assembly code. Tested with QEMU Q35 to still print the revision correctly. Change-Id: I36fb0e8bb1f46806b11ef8102ce74c0d10fd3927 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -141,9 +141,10 @@ bool smm_region_overlaps_handler(const struct region *r)
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* @param smm_revision revision of the smm state save map
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*/
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void smi_handler(u32 smm_revision)
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void smi_handler(void)
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{
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unsigned int node;
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const uint32_t smm_rev = smm_revision();
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smm_state_save_area_t state_save;
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u32 smm_base = SMM_BASE; /* ASEG */
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@ -171,7 +172,7 @@ void smi_handler(u32 smm_revision)
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printk(BIOS_SPEW, "\nSMI# #%d\n", node);
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switch (smm_revision) {
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switch (smm_rev) {
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case 0x00030002:
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case 0x00030007:
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state_save.type = LEGACY;
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@ -199,7 +200,7 @@ void smi_handler(u32 smm_revision)
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SMM_AMD64_ARCH_OFFSET, node);
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break;
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default:
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printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_revision);
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printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_rev);
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printk(BIOS_DEBUG, "SMI# not supported on your CPU\n");
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/* Don't release lock, so no further SMI will happen,
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* if we don't handle it anyways.
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@ -165,10 +165,6 @@ untampered_lapic:
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addl $SMM_STACK_SIZE, %ebx
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movl %ebx, %esp
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/* Get SMM revision */
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movl $0xa8000 + 0x7efc, %ebx /* core 0 address */
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subl %ebp, %ebx /* subtract core X offset */
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#if defined(__x86_64__)
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/* Backup IA32_EFER. Preserves ebx. */
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movl $(IA32_EFER), %ecx
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@ -179,13 +175,7 @@ untampered_lapic:
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/* Enable long mode. Preserves ebx. */
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#include <cpu/x86/64bit/entry64.inc>
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mov (%ebx), %rdi
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#else
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movl (%ebx), %eax
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pushl %eax
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#endif
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/* Call C handler */
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call smi_handler
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@ -15,6 +15,6 @@ void smm_init_completion(void);
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#endif
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/* Entry from smmhandler.S. */
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void smi_handler(u32 smm_revision);
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void smi_handler(void);
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#endif
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