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usbdebug: Fix boards without EARLY_CBMEM_INIT 

The main usbdebug file lib/usbdebug.c was removed from romstage
build with commit f8bf5a10 but the chipset-specific parts were not,
leading to unresolved symbol errors for AMD platforms.

Add a silent Kconfig variable USBDEBUG_IN_ROMSTAGE for convenient
use of this feature.

Change-Id: I0cd3fccf2612cf08497aa5c3750c89bf43ff69be
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3983
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki 2013-10-11 21:14:59 +03:00
parent 569ad760cc
commit ac16405799
14 changed files with 18 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/console/Kconfig
View File

@ -173,6 +173,11 @@ config USBDEBUG
If unsure, say N.
config USBDEBUG_IN_ROMSTAGE
bool
default y if USBDEBUG && EARLY_CBMEM_INIT && EARLY_CONSOLE
default n
if USBDEBUG
config USBDEBUG_HCD_INDEX

2
src/console/console.c
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@ -119,7 +119,7 @@ void console_init(void)
#if CONFIG_SPKMODEM
spkmodem_init();
#endif
#if CONFIG_USBDEBUG && CONFIG_EARLY_CBMEM_INIT && !defined(__BOOT_BLOCK__)
#if CONFIG_USBDEBUG_IN_ROMSTAGE && !defined(__BOOT_BLOCK__)
usbdebug_init();
#endif

2
src/lib/Makefile.inc
View File

@ -49,11 +49,11 @@ romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
romstage-$(CONFIG_SPKMODEM) += spkmodem.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usbdebug.c
ifeq ($(CONFIG_EARLY_CBMEM_INIT),y)
romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
romstage-$(CONFIG_USBDEBUG) += usbdebug.c
endif
romstage-y += compute_ip_checksum.c

2
src/lib/usbdebug.c
View File

@ -581,7 +581,7 @@ err:
static void enable_usbdebug(void)
{
#if defined(__PRE_RAM__) || !(CONFIG_EARLY_CONSOLE && CONFIG_EARLY_CBMEM_INIT)
#if defined(__PRE_RAM__) || !CONFIG_USBDEBUG_IN_ROMSTAGE
pci_devfn_t dbg_dev = pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX);
pci_ehci_dbg_enable(dbg_dev, CONFIG_EHCI_BAR);
#endif

2
src/southbridge/amd/agesa/hudson/Makefile.inc
View File

@ -12,7 +12,7 @@ ramstage-y += sd.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c

2
src/southbridge/amd/cimx/sb700/Makefile.inc
View File

@ -30,5 +30,5 @@ ramstage-y += reset.c
ramstage-y += smbus.c
ramstage-y += lpc.c
romstage-$(CONFIG_USBDEBUG) += ../../sb700/enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb700/enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += ../../sb700/enable_usbdebug.c

2
src/southbridge/amd/cimx/sb800/Makefile.inc
View File

@ -34,7 +34,7 @@ ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
ramstage-y += smbus.c

2
src/southbridge/amd/sb600/Makefile.inc
View File

@ -8,5 +8,5 @@ ramstage-y += hda.c
ramstage-y += ac97.c
ramstage-y += pci.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c

2
src/southbridge/amd/sb700/Makefile.inc
View File

@ -10,7 +10,7 @@ ramstage-y += pci.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
romstage-y += reset.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c

2
src/southbridge/amd/sb800/Makefile.inc
View File

@ -9,5 +9,5 @@ ramstage-y += pci.c
ramstage-y += pcie.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c

2
src/southbridge/intel/common/Makefile.inc
View File

@ -17,5 +17,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c

2
src/southbridge/nvidia/ck804/Makefile.inc
View File

@ -15,7 +15,7 @@ ramstage-y += reset.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c

2
src/southbridge/nvidia/mcp55/Makefile.inc
View File

@ -15,7 +15,7 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc

2
src/southbridge/sis/sis966/Makefile.inc
View File

@ -10,7 +10,7 @@ ramstage-y += pcie.c
ramstage-y += aza.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc