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soc/intel/common: Skip CSE post hook when CSE is disabled 

This patch fixes regression introduced by commit bee4bb5f0
(soc/intel/common/cse: Late sending EOP msg if !HECI_DISABLE_USING_SMM)
FAFT test case fail when doing `firmware_DevMode` test.

If CSE is already hidden then accessing CSE registers would be wrong
and will receive junk, hence, return as CSE is already disabled.

BUG=b:203061531
TEST=Brya system can boot to OS with recovery mode.

Change-Id: I2046eb19716c397a066c2c41e1b027a256bd6cf9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Subrata Banik 2021-10-25 11:23:54 +05:30 committed by Tim Wawrzynczak
parent 66b2f20156
commit ac1bba8e34
1 changed files with 9 additions and 0 deletions
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9
src/soc/intel/common/block/cse/cse_eop.c
View File

@ -175,6 +175,15 @@ static void handle_cse_eop_result(enum cse_eop_result result)
static void set_cse_end_of_post(void *unused) static void set_cse_end_of_post(void *unused)
{ {
/*
* If CSE is already hidden then accessing CSE registers would be wrong and will
* receive junk, hence, return as CSE is already disabled.
*/
if (!is_cse_enabled()) {
printk(BIOS_DEBUG, "CSE is disabled, cannot send End-of-Post (EOP) message\n");
return;
}
set_cse_device_state(PCH_DEVFN_CSE, DEV_ACTIVE); set_cse_device_state(PCH_DEVFN_CSE, DEV_ACTIVE);
timestamp_add_now(TS_ME_BEFORE_END_OF_POST); timestamp_add_now(TS_ME_BEFORE_END_OF_POST);