UCB RISCV: Switch to DYNAMIC_CBMEM
Change-Id: Iaaf68fd19f7b9a5b6849fffde3a9c68cb7862367 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7619 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -29,15 +29,6 @@
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#define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
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#if ! IS_ENABLED(CONFIG_DYNAMIC_CBMEM)
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/*
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* TODO: "High" tables are a convention used on x86. Maybe we can
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* clean up that naming at some point.
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*/
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uint64_t high_tables_base = 0;
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uint64_t high_tables_size;
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#endif
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void cbmem_arch_init(void)
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{
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}
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@ -47,14 +38,6 @@ static struct lb_memory *wtf_write_tables(void)
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{
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unsigned long table_pointer, new_table_pointer;
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#if ! IS_ENABLED(CONFIG_DYNAMIC_CBMEM)
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if (!high_tables_base) {
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printk(BIOS_ERR, "ERROR: high_tables_base is not set.\n");
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}
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printk(BIOS_DEBUG, "high_tables_base: %llx.\n", high_tables_base);
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#endif
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post_code(0x9d);
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table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE,
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@ -91,6 +74,3 @@ void write_tables(void)
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void cbmem_fail_resume(void)
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{
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}
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void get_cbmem_table(uint64_t *base, uint64_t *size)
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{
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}
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@ -3,6 +3,7 @@ config SOC_UCB_RISCV
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select ARCH_BOOTBLOCK_RISCV
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select ARCH_ROMSTAGE_RISCV
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select ARCH_RAMSTAGE_RISCV
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select DYNAMIC_CBMEM
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bool
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default n
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