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mb/asus/p5qpl-am: Do not set BSEL GPIOs in devicetree 

This mainboard has the FSB BSEL straps wired to SuperIO GPIOs. They are
set up in romstage, so it makes no sense to rewrite their values in
ramstage.

Tested, my Asus P5QPL-AM still boots.

Change-Id: Ic47f96d12420ebcc70ab5cea940c4c09620c03ca
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-03-08 20:10:48 +01:00 committed by Patrick Georgi
parent 915d1eaeae
commit acabbce229
1 changed files with 6 additions and 13 deletions
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19
src/mainboard/asus/p5qpl-am/variants/p5qpl-am/overridetree.cb
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@ -22,9 +22,6 @@ chip northbridge/intel/x4x # Northbridge
chip superio/winbond/w83627dhg chip superio/winbond/w83627dhg
device pnp 2e.0 off end # Floppy device pnp 2e.0 off end # Floppy
device pnp 2e.1 on # Parallel port device pnp 2e.1 on # Parallel port
# global
irq 0x2c = 0x92
# parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
drq 0x74 = 3 drq 0x74 = 3
@ -40,16 +37,12 @@ chip northbridge/intel/x4x # Northbridge
irq 0x70 = 1 irq 0x70 = 1
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.6 off end # SPI device pnp 2e.6 off end # SPI
device pnp 2e.7 on end # GPIO6 (all input) device pnp 2e.7 on end # GPIO6 (all input)
device pnp 2e.8 off end # WDT0#, PLED device pnp 2e.8 off end # WDT0#, PLED
device pnp 2e.9 off end # GPIO2 device pnp 2e.9 off end # GPIO2
device pnp 2e.109 on # GPIO3 device pnp 2e.109 on end # GPIO3
irq 0xf0 = 0xf3 device pnp 2e.209 on end # GPIO4
end
device pnp 2e.209 on # GPIO4
irq 0xf4 = 0x00
end
device pnp 2e.309 off end # GPIO5 device pnp 2e.309 off end # GPIO5
device pnp 2e.a on # ACPI device pnp 2e.a on # ACPI
irq 0x70 = 0 irq 0x70 = 0