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mb/google/brya/var/taeko: Fix PLD group order (W/A) 

In commit 667471b8d8 (ec/google/chromeec: Add PLD to EC conn in ACPI 
table), PLD is added to ACPI table. It causes the DUT to not boot into
the OS. So fix the USB3/USB2 Type-C Port C2 PLD group order from 3 to 2
to solve this issue.

Fixes: 667471b8d8 ("ec/google/chromeec: Add PLD to EC conn in ACPI table")
BUG=b:209723556
BRANCH=none
TEST=build coreboot and boot into OS.

Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com>
Change-Id: Ia4cf2d735de524ae721800600536923d1d47f04b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59973
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Kevin Chang 2021-12-08 15:29:40 +08:00 committed by Felix Held
parent 92226dc6c3
commit acb17fec34
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brya/variants/taeko/overridetree.cb
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@ -443,7 +443,7 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
end
@ -463,7 +463,7 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
end